• Proceedings of the KIPE Conference
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• 2017.07a
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• pp.132-133
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• 2017

본 논문은 DC 배전용 반도체 차단기를 모델링하고, 바리스터 동작 특성을 MATLAB/SIMULINK를 이용해 실험 결과와 비교 분석하였다. 단락 전류 차단을 위한 반도체 소자는 전력용 반도체 스위치인 IGBT를 이용하였으며, 회로 차단 시 인덕턴스 성분에 의해 발생하는 과전압으로부터 차단기를 보호하기 위해 바리스터를 IGBT에 병렬 연결하였다. 바리스터는 수학적 모델링을 통해 로그 스케일에서 파라미터를 산출하였으며, 비선형 저항 특성을 시뮬레이션 환경에서 표현하였다. DC 반도체 차단기는 MATLAB 기반으로 모델링하였으며, 산출된 파라미터는 바리스터 모델에 적용하여 시뮬레이션하였다. 또한, 1kV/1.5kA 차단 실험 결과를 비교 분석하여 제안된 DC 배전용 반도체 차단기의 모델의 특성을 검증하였다.

• Journal of the Korean Society for Aeronautical & Space Sciences
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• v.32 no.9
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• pp.114-121
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• 2004

Thermal design changes and analysis on the engineering model of Command Telemetry Unit(CTU) for a geostationary communications satellite arc performed for the purpose of developing an engineering qualification model. A thermal model is developed by using power consumption measurement values of each functional board and thermal cycling test results. In modeling heat dissipated EEE parts, heat dissipation is imposed evenly on the EEE part footprint area which is projected to the printed circuit board. All the EEE parts of CTU meet the requirement of their allowable temperature range when placed on the engineering qualification level of thermal vacuum environments in accordance with the proposed thermal design changes.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.25 no.1
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• pp.47-52
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• 2014

A simple RC circuit model of large-scale touch screen panels is developed and the frequency range of the RC model is analyzed. 2D EM simulation results of a single touch cell are cascaded for a 23 inch touch panel using a circuit simulator, and the shortest and longest channels of the full panel are modeled with a 5-element RC circuit. The 5-element RC circuit can model the touch screen panel upto 130 kHz with the channel phase error of $10^{\circ}$. 7-element RC circuit model is also proposed and the frequency range for the channel phase error of $10^{\circ}$ is extended to 200 kHz.

• Proceedings of the Korean Society for Noise and Vibration Engineering Conference
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• 2003.05a
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• pp.762-769
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• 2003

본 연구에서는 적층형 압전소자를 이용하여 초소형 및 슬림형 광디스크 드라이브용 광픽업 구동기를 개발하였다. 최근에 휴대용 정보기기의 급격한 발달로 인해 다양한 형태의 초소형 정보저장기기가 사용되고 있으며 착탈식 형태의 초소형 광디스크를 사용하는 ODD가 개발 중에 있다. 적층 형태의 압전소자와 유연 힌지 형태의 변위 확대기구를 사용하여 구동기의 출력 힘과 허용 변위를 증가시키도록 설계하였다. 압전형 구동기의 동특성을 고려한 모델링과 이론적 해석을 통해 목표 변위와 성능을 만족하도록 설계 변수를 최적화하였고 이를 ANSYS를 이용한 해석과 비교하였다. 상용화된 적층형 압전소자를 이용한 prototype 올 제작하여 실험을 수행하였으며 이론적인 예상 값과 잘 일치함을 보였다. 이와 같은 이론적 해석과 실험 결과를 토대로 높이가 2.5mm이며 15V 에서 $\pm$400$\mu\textrm{m}$의 변위를 갖는 슬림형 및 초소형 ODD에 적합한 압전형 구동기를 설계하였다.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.41 no.5
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• pp.23-36
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• 2004

A computationally efficient and accurate Monte Carlo (MC) simulator of electron beam lithography process has been developed for sub-0.l${\mu}{\textrm}{m}$ T-shaped gate formation in the HEMT devices for millimeter-wave frequencies. For the exposure process by electron to we newly and efficiently modeled the inner-shell electron scattering and its discrete energy loss with an incident electron for multi-layer resists and heterogeneous multi-layer targets in the MC simulation. In order to form the T-gate shape in resist layers, we usually use the different developer for each resist layer to obtain good reproducibility in the fabrication of HEMT devices. To model accurately the real fabrication process of electron beam lithography, we have applied the different developers in trilayer resist system By using this model we have simulated and analyzed 0.l${\mu}{\textrm}{m}$ T-gate fabrication process in the HEMT devices, and showed our simulation results with the SEM observations of the T-shaped gate process.

• Journal of the Korean Magnetics Society
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• v.12 no.2
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• pp.68-72
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• 2002

In this research, the effects of capacitance to the access time were studied at the junction area of tunneling magnetoresistance when these were used as memory devices. These results were obtained by applying electric signal input and magnetic field was not used. We applied bipolar square waves of 1MHz to the MTJ samples to obtain the results and time constant ($\tau$) calculated by observing wave responses utilizing an oscilloscope. And time constant was compared with junction area. Each part of MTJ sample, such as electrical pad, lead and contact area, was modeled as an electrical equivalent circuit based on experimental results. For the 200㎛$\times$200㎛ cell, junction capacitance was 90 pF. Also, measurement and simulation results were compared, which showed those similarity.

• Journal of the Korean Institute of Intelligent Systems
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• v.25 no.2
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• pp.161-167
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• 2015

In this paper, a novel thermoelectric cooling system utilizing condensed water is introduced and its electrical equivalent circuit model is proposed. The introduced system can deals with the condensed water and improves efficiency by spraying the condensed water on heat sink. The electrical equivalent circuit model is derived by combining the circuit model of the classical thermoelectric cooling system with equation of heat exchange. Because the parameters of the model can be defined from not other experimental data but just the data sheet of the thermoelement, the model can be useful to design and develop the controller of the proposed system. We verify that the proposed model is valid and the introduced system is more efficient than the previous thermoelectric cooling system through simulations.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.38 no.8
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• pp.1-12
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• 2001

The adaptive learning circuit is designed on the basis of modeling of MFSFET (Metal-Ferroelectric-Semiconductor FET) and the numerical results are analyzed. The output frequency of the adaptive learning circuit is inversely proportional to the source-drain resistance of MFSFET and the capacitance of the circuit. The saturated drain current with input pulse number is analogous to the ferroelectric polarization reversal. It indicates that the ferroelectric polarization plays an important role in the drain current control of MFSFET. The output frequency modulation of the adaptive learning circuit is investigated by analyzing the source-drain resistance of MFSFET as functions of input pulse numbers in the adaptive learning circuit and the dimensionality factor of the ferroelectric thin film. From the results, the frequency modulation characteristic of the adaptive learning circuit are confirmed. In other words, adaptive learning characteristics which means a gradual frequency change of output pulse with the progress of input pulse are confirmed. Consequently it is shown that our circuit can be used effectively in the neuron synapses of nueral networks.

• Journal of Advanced Navigation Technology
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• v.20 no.3
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• pp.218-225
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• 2016

Null steering and beam steering are known well as anti-jamming methods in GPS anti-jamming system. Null steering gets a noise attenuation effect for the direction of jamming and beam steering earns additional gain synthesis for the direction of satellite signals. According to the research in the article for signal processing, it expresses that the N array antenna is effective for N-1 number of jamming signal by math public interest, however, the two algorithms analysis is not unknown for the operating condition of the realistic vehicle. In this paper, we modeled anti-jamming system using 4 and 7 array antenna and showed the two algorithms performance (PM, LCMV) when considering the number of antenna array, jammers and vehicle position (horizontal, vertical). In result, we showed that the case of vertical position of the vehicle which has large tilt angle for the relative position of satellites and jammers, has about 10 dB gain more in comparison with one of vertical position in spite of same JSR condition.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.46 no.1
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• pp.94-101
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• 2009

This paper presents scalable modeling of spiral inductors for RFIC design based on $0.13{\mu}m$ RF CMOS process. For scalable modeling, several inductor patterns are designed and fabricated with variations of width, number of turns and inner radius. Feeding structures are optimized for accurate de-embedding of pad effects. After measuring the S parameters of the fabricated patterns, double-$\pi$ equivalent circuit parameters are extracted for each device and their geometrical dependences are modeled as scalable functions. The inductor library provides two types of models including standard and symmetric inductors. Standard and symmetric inductors have the range of $0.12{\sim}10.7nH$ and $0.08{\sim}13.6nH$ respectively. The models are valid up to 30GHz or self-resonance frequency. Through this research, a scalable inductor library with an error rate below 10% is developed for $0.13{\mu}m$ RF CMOS process.