• Proceedings of the Korean Information Science Society Conference
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• 2010.06c
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• pp.132-137
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• 2010

이 논문에서는 전력기기의 사용량증가에 따른 전력량 부족으로 전력공급확보에 필요한 인원, 자재, 비용 등의 부족과 발전연료비용의 상승, 전력발전에 따른 $CO_2$배출량증가 등의 문제점을 최소화하기 위한 전력관리시스템(Demand Response System)을 제안한다. 전력관리 시스템은 전력사용자와 전력사업자와의 협력을 통해 전력확보와 수요를 관리하기 위한 전력절감 이벤트, 전력사용량 모니터링, 분석 등의 기능을 통하여 전력수요 관리가 가능한 시스템이다. 더 나아가 전력소비 관리가 이루어짐으로써 전력생산량 감소에 따른 이산화탄소의 절감효과를 기대할 수 있을 것이다.

• Journal of Sensor Science and Technology
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• v.12 no.6
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• pp.231-240
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• 2003

The problem of power consumption and the limitation of a chip area should be considered when the pixel number of the edge detection circuit increases to fabricate a vision chip for edge detection with high resolution. The numeric increment of the unit circuit causes power consumption to increase and require a larger chip area. An increment of power consumption and a limitation of chip area with several ten milli-meters square supplied by the CMOS foundry company restrict the pixel numbers of the edge detection circuit. In this paper, we proposed a electronic switch to minimize the power consumption owing to the numeric increment of the edge detection circuit to realize a vision chip for edge detection with high resolution. We also applied a method by which photodetector and edge detection circuit are separated to implement a vision chip with a higher resolution. The photodetector circuit with $128{\times}128$ pixels uses a common edge detection circuit with $1{\times}128$ pixels so that resolution was improved at the same chip area. The chip size is $4mm{\times}4mm$ and the power consumption was confirmed to be about 20mW using SPICE.

• Journal of the Korea Computer Industry Society
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• v.6 no.5
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• pp.741-748
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• 2005

Power saving module which is consisted of ferroelectric ceramic capacitor and time delay switching circuit was installed into electronic ballast in order to enhance energy efficacy and extend life time of fluorescent lamp. The impedance matching of negative resistance characteristics of F/L was optimized with the characteristics of ferroelectric ceramics capacitor to increase the light efficiency of the electronic ballast. The high efficiency of the electronic ballast was achieved by minimizing wasted power at the filament of F/L during the lighting by using the switching function of time delay circuit from preheating mode to non-preheating mode. The life time of F/L was also extended by eliminating the reverse electromotive force using time delay circuits to minimize the impacts to the filament of F/L from unwanted high voltage peaks during light-up period. As the results, the electronic ballast with the first grade energy efficiency was developed using ferroelectric ceramics and time delay module.

• The Journal of the Korea institute of electronic communication sciences
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• v.11 no.2
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• pp.159-164
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• 2016

A wireless communication system is required to be implemented with the low power circuits because it uses a battery having a limited energy. Therefore, the current mode circuit has been studied because it consumes constant power regardless of the frequency change. However, the clock-feedthrough problem is happened by leak of stored energy in memory operation. In this paper, we suggest the current memory circuit to minimize the clock-feedthrough problem and introduce a technique for ultra low power operation by inducing dynamic voltage scaling. The current memory circuit was designed with BSIM3 model of $0.35{\mu}m$ process and was operated in the near-threshold region. From the simulation result, the clock-feedthrough could be minimized when designing the memory MOS Width of $2{\mu}m$, the switch MOS Width of $0.3{\mu}m$ and dummy MOS Width of $13{\mu}m$ in 1MHz switching operation. The power consumption was calculated with $3.7{\mu}W$ at the supply voltage of 1.2 V, near-threshold voltage.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.34 no.3B
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• pp.247-254
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• 2009

Over the last decade multiple-input and multiple-output (MIMO) systems have been actively researched and started to be deployed in wireless communications owing to the significant increase in channel capacity. In this paper, we propose a energy saving MAC protocol in systems by focusing on energy efficiency instead of capacity maximization. We considers the energy consumption together with the tradeoff between reliability (i.e., diversity) and throughput (i.e., multiplexing gain), and dynamically chooses an appropriate number of antennas for transmission. In computing the total energy consumption, we counts circuit energy as well as transmission energy. Naturally the circuit energy consumption is directly proportional to the number of active antennas. Through numerical analysis, we confirm that our power saving MAC scheme for MIMO considerably saves energy consumption compared to conventional capacity maximization schemes that use a fixed number of MIMO channels, for a given outage constraint. Our finding is that the capacity maximizing communication which possibly can be regarded best in terms of energy efficiency gives a different solution from the energy minimizing communication.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.36 no.9B
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• pp.1082-1091
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• 2011

Power-reduction techniques based on DVFS(Dynamic Voltage and Frequency Scaling) are crucial for lengthening operating times of battery powered mobile systems. This paper proposes an optimal DVFS scheduling algorithm for decoders with memory size limitation on display buffer, which is realistic constraints not properly touched in the previous works. Furthermore, we mathematically prove that the proposed algorithm is optimal in the limited display buffer and limited clock frequency model, and also can be used for feasibility check. Simulation results show the proposed algorithm outperformed the previous heuristic algorithms by 7% in average, and the performance of all algorithms using display buffers saturates at about 10 frame size.

• The KIPS Transactions:PartA
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• v.17A no.1
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• pp.27-32
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• 2010

Logical Effort is a simple hand-calculated method that measures quick delay estimation. It has the advantage of reducing the design cycle time. However, it has shortcomings in designing a path for minimum area or power under a fixed-delay constraint. In this paper, we propose an equal delay model and, based on this, a method of optimizing power-delay efficiency in a logical path. We simulate three designs of an eight-input AND gate using our technique. Our results show about 40% greater efficiency in power dissipation than those of Logical Effort method.

• Proceedings of the Korean Information Science Society Conference
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• 2010.06d
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• pp.170-173
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• 2010

최근 진보된 무선 통신 기술과 발전된 의료 기술로 인하여 u-Health의 핵심 기술인 WBAN에 대한 연구가 활발히 진행되고 있다. 인체에 이식 가능한 WBAN 장치는 전원 공급에 제한이 있으므로 소비전력을 최소화하기 위한 MAC 프로토콜이 필요하다. 본 논문은 WBAN 장치의 다양한 무선 통신 특성을 적용한 시뮬레이터에 관한 것으로 MICS 대역의 채널 특성을 적용하였고, 데이터의 신뢰성과 에너지 효율성을 향상시키기 위해 가변 패킷 및 비트맵 기반의 패킷 블록 전송기법을 적용한 MAC 프로토콜을 사용한다.

• Proceedings of the KIEE Conference
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• 2011.07a
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• pp.630-631
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• 2011

현재 우리나라 전력시장에서 시장가격(SMP) 결정시에는 전력계통 운영 및 발전기 자기제약에 기인한 Must Run 등의 제약요소들을 고려하지 않고 실제 전력계통 운영시에만 반영하고 있다. 그러나 전력을 안정적으로 공급하기 위해서는 다양한 제약조건을 충족시켜야 하므로 시장가격은 원칙적으로 이러한 기술적인 제약을 충족시키는 조건에서 결정되어야 한다. 따라서 각종 제약요소 처리 관련 효율적인 전력의 생산 및 소비, 신규투자 등에 대한 시장신호를 제공하기 위해 필요한 개선방향 검토, 시장에 미치는 영향을 분석하고 가능한 개선대안을 모색하여 보았다. 현실적으로 가능한 전력계통 예비력 확보 조건, 발전기 자기제약의 반영 등은 단기적으로 시행하되, 계통제약을 반영한 지역별가격제는 송전이용요금의 개선과 병행하여 점진적으로 개선하는 것이 바람직할 것이다.

• Proceedings of the KIPE Conference
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• 2006.06a
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• pp.31-33
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• 2006

최근 IT 기술의 발달로 배전자동화 시스템에 많은 통신방식들이 적용되고 있다. 이 중에서 기존 인프라를 사용하는 방식인 전력선통신 기술은 가장 효율적인 통신방식으로 언급되고 있다. 이를 배전자동화 시스템에 적용하기 위해서는 별도의 신호처리 장치와 통신장치가 필요하나, 비용, 설치 및 운영의 불편함으로 확대 적용에 많은 애로점을 가지고 있다. 본 논문에서는 이러한 문제점을 해결하기 위해 SoC 기술을 이용 전력선 통신을 위한 통신 모듈과 고해상도 아나로그 디지털 변환기, 제어용 신호를 처리하는 전용 디지털 신호처리 장치를 결합, 하나의 칩으로 설계하여 경량, 박막화를 실현하였다. 이로 인해 구성부품이 최소화되면서 개발과정이 단축되고, 성능, 전력 소비면에서 유리하며, 다양한 기능을 구비한 전력선통신기반 제어 시스템을 설계할 수 있다.