• The Journal of Korean Institute of Communications and Information Sciences
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• v.32 no.2A
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• pp.152-161
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• 2007

IEEE 802.11 Wireless Local Area Network (WLAN) became a prevailing technology for the broadband wireless Internet access, and new applications such as Voice over WLAM (VoWLAN) are fast emerging today. For the battery-powered VoWLAN devices, the standby time extension is a key concern for the market acceptance while today's 802.11 is not optimized for such an operation. In this paper, we propose a novel Idle Mode operation, which comprises paging, idle handoff, and delayed handoff. Under the idle mode operation, a Mobile Host (MH) does not need to perform a handoff within a predefined Paging Area (PA). Only when the MH enters a new PA, an idle handoff is performed with a minimum level of signaling. Due to the absence of such an idle mode operation, both IP paging and Power Saving Mode (PSM) have been considered the alternatives so far even though they are not efficient approaches. We implement our proposed scheme in order to prove the feasibility. The implemented prototype demonstrates that the proposed scheme outperforms the legacy alternatives with respect to energy consumption, thus extending the standby time.

• KEPCO Journal on Electric Power and Energy
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• v.3 no.1
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• pp.65-72
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• 2017

This study analyzed causal relationship between electricity consumption and economic output (GDP) for Korea from 2001 to 2014 employing the vector error-correction model estimation by manufacturing sector. The results of unit-roots tests show that all sectoral GDP and electricity consumptions were not stationary. And cointegration tests show that processed foods, Wood Pulp Paper, electricity apparatus, Precision Medical sectors had a linear combinations in the long run between electricity consumptions and economic growth. With respect to the direction of causality, manufacturing sector has a uni-directional running from economic output (GDP) to electricity consumption in short term. The results of study show that sectoral causal relation were different each other in short term and long term. These findings imply that electricity demand management policy focusing on efficiency improvement is necessary to minimize negative impacts on economic growth and to adopt suitable structural policies can induce energy conservation.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.1
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• pp.8-15
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• 2007

This paper proposed hardware architecture of the block cryptographic algorithm HIGHT aiming small size and low power application, and analyzed its performance. The HIGHT is a modified algorithm of the Feistel. The encryption and decryption circuit were designed as one iterative block. It reduces the redundant circuit that yields small area. For the performance improvement, the circuit generates 32-bit subkey during 1 clock cycle. we synthesized the HIGHT with Hynix $0.25-{\mu}m$ CMOS technology. The proposed circuit size was 2.658 EG(equivalent gate), and its power consumption was $10.88{\mu}W$ at 2.5V for 100kHz. It is useful for a passive RFID tag or a smart IC card of a small size and low power.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.11 no.6
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• pp.247-253
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• 2011

In this paper, we propose and implement the automated brightness control system using distance measuring sensor for reducing the power consumption of emotional lighting device. In order to reduce the power consumption of emotional lighting devices which express continuous color changes, the proposed device measures the distance continuously using ultrasonic sensor and by using this, it also performs PWM Dimming control. The lighting device is composed of micro controller, LED driver, ultrasonic sensor, communication module and so on. And the device performs the real time brightness control by adapting the measured distance information from ultrasonic sensor to PWM signals. From this experiment, we implement the active lighting system which minimizes unnecessary power consumption during user's absence by adapting existing energy reducing techniques.

• Journal of the Institute of Electronics Engineers of Korea CI
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• v.46 no.5
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• pp.1-13
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• 2009

Filter cache has been introduced as one solution of reducing cache power consumption. More than 50% of the power reduction results from the filter cache, whereas more than 20% of the performance is compromised. To minimize the performance degradation of the filter cache, the predictive filter cache has been proposed. In this paper, we review the previous filter cache predictors and analyze the problems of the solutions. As a result, we found main problems that cause prediction misses in previous filter cache schemes and, to resolve the problems, this paper proposes a new prediction policy. In our scheme, some reference bit entries, called MSBs, are inserted into filter cache and BTB, to adaptively control the filter cache access. In simulation parts, we use a modified SimpleScalar simulator with MiBench benchmark programs to verify the proposed filter cache. The simulation result shows in average 5% performance improvement, compared to previous ones.

• Journal of IKEEE
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• v.25 no.1
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• pp.206-211
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• 2021

This paper proposes a Self-Reset Zero-Current Switching (ZCS) Circuit for thermoelectric energy harvesting. The Self-Reset ZCS circuit minimizes the operating current consumed by the voltage comparator, thereby reduces the power consumption of the energy harvesting circuit and improves the energy conversion efficiency by adding the self-reset function to the comparator. The Self-Reset ZCS circuit shows 3.4% of improvement in energy efficiency compared to the energy harvesting system with the conventional analog comparator ZCS for the output/input voltage ratio of 5.5 as a result of circuit simulation. The proposed circuit is useful for improving the performance of the wearable and bio-health-related harvesting circuits, where low-power and energy-efficient thermoelectric energy harvesting is needed.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.46 no.2
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• pp.27-37
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• 2009

Sensor nodes forming a sensor network have limited energy capacity such as small batteries and when these nodes are placed in a specific field, it is important to research minimizing sensor nodes' energy consumption because of difficulty in supplying additional energy for the sensor nodes. Clustering has been in the limelight as one of efficient techniques to reduce sensor nodes' energy consumption in sensor networks. However, energy saving results can vary greatly depending on election of cluster heads, the number and size of clusters and the distance among the sensor nodes. /This research has an aim to find the optimal set of clusters which can reduce sensor nodes' energy consumption. We use a Genetic Algorithm(GA), a stochastic search technique used in computing, to find optimal solutions. GA performs searching through evolution processes to find optimal clusters in terms of energy efficiency. Our results show that GA is more efficient than LEACH which is a clustering algorithm without evolution processes. The two-dimensional GA (2D-GA) proposed in this research can perform more efficient gene evolution than one-dimensional GA(1D-GA)by giving unique location information to each node existing in chromosomes. As a result, the 2D-GA can find rapidly and effectively optimal clusters to maximize lifetime of the sensor networks.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.37 no.7B
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• pp.578-585
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• 2012

Location tracking system through GPS and Wi-Fi is available at no additional cost in an environment of IEEE 802.11-based wireless network. It is useful for many applications in outdoor environment. However, a previous systems used for general device to tag. It is unsuitable for power aware location tracking system because general devices is more expensive and non-optimized for tracking. The hand-off method of IEEE 802.11 standard is not enough considering power consumption. This thesis analyzes the previous location tracking systems and proposes power aware system. First, we designed and implemented tag to optimize location tracking. Next, we propose low-power hand-off method and low-power behavior model in implemented tag. The proposed hand-off method resolve power problem by using the location information and behavior model minimize power consumption of tag through power-saving mode and the concept of duty cycle. To evaluating proposed methods and system performance, we perform simulations and experiments in real environment. And then, we calculate tag's power consumption based on the actual measured current consumption of each operation. In a simulation result, the proposed behavior model and hand-off method reduced about 98%, 59% than the standard's hand-off and default behavior model.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.39C no.2
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• pp.115-121
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• 2014

Since the rapid development of information age and information technology might be considered to cause environmental problems, Green IT is perceived as core technology for low carbon green growth and the minimum waste of electricity. In this vein, Green IT is becoming new paradigm of focusing on natural environment. This study examines current various IT required for green growth, and studies various methods for diminution of carbon discharge in Korea and other countries. Especially, it focuses on the diminution effect of carbon discharge by using Green PC, and compares the difference of voltage, voltaic current, and the use of electricity between Normal PC and Green PC by using HPM-300A, and measures carbon discharge of Normal PC and Green PC. The result shows that the diminution effect of $CO_2$ discharge of Green PC is amount to 11.5Kg per year, and the effect of green growth is up to the conservation of 2 or 3 pine trees.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.41 no.5
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• pp.61-70
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• 2004

The operation mode of neural network is divided into learning and recognition process. Learning is updating process of weight until neural network archives target result from input pattern. Recognition is arithmetic process of input pattern and weight. Traditional inner product process is focused to improve processing speed and hardware complexity. There is no hardware architecture to distinguish between loaming and recognition mode of neural network. In this paper we propose the new architecture of low power inner product processor for reconfigurable neural network. The proposed architecture is similar with bit-serial inner product processor on learning mode. It have several advantages which are fast processing base on bit-level, suitability of hardware implementation and pipeline architecture to compute data. And proposed architecture minimizes active units and reduces consumption power on recognition mode. Result of simulation shows that active units is depend on bit representation of weight, but we can reduce active units about 50 precent.