• Journal of Korea Society of Industrial Information Systems
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• v.27 no.6
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• pp.69-75
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• 2022

We propose energy-efficient scheduling considering real-time constraints and energy efficiency in smart mobile with heterogeneous multi-core structure. Recently, high-performance applications such as VR, AR, and 3D game require real-time and high-level processings. The big.LITTLE architecture is applied to smart mobiles devices for high performance and high energy efficiency. However, there is a problem that the energy saving effect is reduced because LITTLE cores are not properly utilized. This paper proposes a heterogeneous multi-core assignment technique that improves real-time performance and high energy efficiency with big.LITTLE architecture. Our proposed method optimizes the energy consumption and the execution time by predicting the actual task execution time using SVM (Support Vector Machine). Experiments on an off-the-shelf smartphone show that the proposed method reduces energy consumption while ensuring the similar execution time to legacy schemes.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2021.10a
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• pp.194-198
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• 2021

LoRa is a physical layer technology that is designed to provide a reliable long-range communication with introducing CSS and with introducing a loco parentis tree network. Since a leaf can utilize multiple parents at the same time with a single transmission, PDR increases logarithmically as the number of gateways increases. Because of the ALOHA-like MAC of LoRa, however, the PDR degrades even under the loco parentis tree topology similarly to the single-gateway environment. Our proposed method is aimed to achieve SDMA approach to reuse the same frequency in different areas. For that purpose, it elaborately controls each TxPower of the senders for each message in concurrent transmission to survive the collision at each different gateway. The gain from this so-called capture effect increases the capacity of resource-hungry LPWAN. Compared to a typical collision-free controlled-access scheme, our method outperforms by 10-35% from the perspective of the total count of the consumed time slots. Also, due to the power control mechanism in our method, the energy consumption reduced by 20-40%.

• Proceedings of the Korean Information Science Society Conference
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• 2004.10a
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• pp.559-561
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• 2004

임베디드 시스템은 정해진 하드웨어 환경에서 특정 어플리케이션이 돌아가는 형태로 존재한다. 코드 압축은 이러한 임베디드 시스템환경에서 메모리와 프로세서간의 소모되는 전력을 줄이는 가장 효과적인 방법으로 잘 알려져 있다. 본 논문에서는 기존과는 다른 접근방법을 통해 이 문제를 정의하고, 압축되는 명령어들의 이진코드를 결정하는 방법을 제시하고자 한다. 압축될 명령어들에 적절한 이진코드를 할당한다면 상당한 에너지를 절약할 수 있다. 이는 명령어 접근 때 발생하는 스위칭 활동이 이진코드할당에 큰 영향을 받기 때문이다. 전력 절감을 위해 이 문제를 그래프 최적화 문제로 전환을 하고, 점진적인 노드 커버링 테크닉(incremental node covering technique)을 사용하여 부분적으로는 효율적이면서도 전체적으로는 효과적인 방법으로 해결하고자 한다.

• Journal of KIISE
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• v.43 no.3
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• pp.296-303
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• 2016

Mobile real-time systems with limited system resources and a limited power source need to fully utilize the system resources when the workload is heavy and reduce energy consumption when the workload is light. EDZL (Earliest Deadline until Zero Laxity), a multiprocessor real-time scheduling algorithm, can provide high system utilization, but little work has been done aimed at reducing its energy consumption. This paper tackles the problem of DVFS (Dynamic Voltage/Frequency Scaling) in EDZL scheduling. It proposes a technique to compute a uniform speed on full-chip DVFS platforms and individual speeds of tasks on per-core DVFS platforms. This technique, which is based on the EDZL schedulability test, is a simple but effective one for determining the speeds of tasks offline. We also show through simulation that the proposed technique is useful in reducing energy consumption.

• Proceedings of the KIPE Conference
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• 2010.07a
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• pp.238-239
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• 2010

주거 상업용 건물에 있어 최근 TV, LED 조명, 컴퓨터, IT 기기들과 같은 직류를 사용하는 부하가 점차 증가함에 따라 기존의 교류 배전 기반의 건물 전력구조에서 에너지절감을 위한 하나의 방안으로 직류기반의 건물 배전구조에 대한 도입에 대한 연구가 활발히 이뤄지고 있다. 또한 직류 형태의 전원인 태양광 발전, 연료전지 등의 신재생 에너지와 가정 및 전기자동차용 배터리의 등장은 직류 기반 전력구조가 가지는 강점을 더욱 부각시키고 있다. 직류 배전 시스템은 기존 교류 배전에서 직류부하를 위한 다중의 전력 변환 과정을 최소화함으로서 전원 및 부하에서 소모되는 에너지를 절감하여 전력시장 내 전체적인 탄소배출량 저감에 기여할 수 있을 것으로 고려되어지고 있다. 이는 직류배전 시스템의 에너지 저감 효용성 이외 기존 교류배전 대비 부하단 부품 수의 감소에 따른 신뢰성 향상 및 가격 저감, 무효전력 고려사항의 제거 등 많은 장점을 가지기 때문이다. 본 논문에서는 소용량 건물에 직류배전 구조가 도입될 경우 실현 가능성이 높은 대표적 직류 배전 구조들을 Functional Modeling 기법을 통해 모델링하며, 시뮬레이션을 통해 기존의 교류 배전 건물과 함께 각각의 전력계 구조에 대한 효율 및 장단점들을 정성적으로 비교하고, 구현에 필요한 고려사항들을 제시한다.

• KIPS Transactions on Computer and Communication Systems
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• v.4 no.11
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• pp.369-382
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• 2015

Energy aware server clusters aim to reduce power consumption at maximum while keeping QoS(quality of service) compared to energy non-aware server clusters. They adjust the power mode of each server in a fixed or variable time interval to activate only the minimum number of servers needed to handle current user requests. Previous studies on energy aware server cluster put efforts to reduce power consumption or heat dissipation, but they do not consider energy efficiency well. In this paper, we propose an energy efficient cluster management method to improve not only performance per watt but also QoS of the existing server power mode control method based on autonomous learning. Our proposed method is to adjust server power mode based on a hybrid approach of autonomous learning method with multi level thresholds and power consumption prediction method. Autonomous learning method with multi level thresholds is applied under normal load situation whereas power consumption prediction method is applied under abnormal load situation. The decision on whether current load is normal or abnormal depends on the ratio of the number of current user requests over the average number of user requests during recent past few minutes. Also, a dynamic shutdown method is additionally applied to shorten the time delay to make servers off. We performed experiments with a cluster of 16 servers using three different kinds of load patterns. The multi-threshold based learning method with prediction and dynamic shutdown shows the best result in terms of normalized QoS and performance per watt (valid responses). For banking load pattern, real load pattern, and virtual load pattern, the numbers of good response per watt in the proposed method increase by 1.66%, 2.9% and 3.84%, respectively, whereas QoS in the proposed method increase by 0.45%, 1.33% and 8.82%, respectively, compared to those in the existing autonomous learning method with single level threshold.

• Journal of KIISE:Computer Systems and Theory
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• v.34 no.3
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• pp.101-112
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• 2007

Hard disks have been the most prevalent secondary storage devices and these days their usage is becoming more important in mobile computing systems due to I/O intensive applications such as multimedia applications and games. However, significant power consumption in the disk drives still limits battery lifetimes of mobile systems critically. In this paper, we show that using several smaller disks (instead of one large disk) can be an energy-efficient secondary storage solution on typical mobile platforms without a significant performance delay. Also, we propose a novel energy-efficient technique, which clusters related data into groups and migrates the correlated groups to the same disk. We compare this method with the existing data concentration scheme, and also combine them. The experiments show that our technique saves the energy consumption up to 34% when a pair of 1.8' disks is used instead of a single 2.5' disk with a negligible increase in the average response time. The results also show that our method also saves up to 14.8% of disk energy consumption and improve the average I/O response time by up to 10 times over the existing scheme.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2015.10a
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• pp.1002-1005
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• 2015

Mobile operating systems have been typically classified into Apple and Android. Samsung showed its own new mobile OS developing Tizen based on Linux kernel. Mobile operating system has developed a technology using low-power by itself because of the limitation of capacity of battery, a feature of mobile. Samsung Tizen OS has a low-power technology called Power Manager controling LCD states as users'inputs or time-out events occur. However, if users'input occurs frequently, energy consumption jumped before-and-after users'input because CPU clock is increased rapidly due to overhead increase for frequent LCD state changes. This paper proposes a mechanism to reduce the overhead for LCD state changes, when user's input is frequent, by adding a new state to the Power Manager the current Tizen OS is using. We have implemented the proposed mechanism at Tizen phone kernel layer in this paper and experimented the mechanism according to users' LCD touch inputs. The experiment shows that it is possible to decrease energy by reducing the CPU clock increase according to the frequent user's inputs.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.12
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• pp.96-104
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• 2009

In the real system environments, the performance of the application is not linearly proportional to the clock frequency of the microprocessor, in contrast to the general assumption of conventional dynamic voltage scaling. In this paper, we analytically model the relation between the performance of the application and the clock frequency of the microprocessor, and introduce the energy-optimal scheduling algorithm for a task set with distinct application characteristics. In addition, we present a theorem for the energy-optimal scheduling, which the derivative of the energy consumption with respect to the execution time should be the same for all the tasks. The proposed scheduling algorithm always generates the energy-optimal scaling factor thanks to the theorem for energy-optimal scheduling. We achieved about 7% additional energy reduction in the experiments using synthetic task sets.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.2
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• pp.82-92
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• 2008

Recently, many digital signal processing(DSP) applications such as H.264, CDMA and MP3 are predominant tasks for modern high-performance portable devices. These applications are generally computation-intensive, and therefore, require quite complicated accelerator units to improve performance. Designing such specialized, yet fixed DSP accelerators takes lots of effort. Therefore, DSPs with multiple accelerators often have a very poor time-to-market and an unacceptable area overhead. To avoid such long time-to-market and high-area overhead, dynamically reconfigurable DSP architectures have attracted a lot of attention lately. Dynamically reconfigurable DSPs typically employ a multi-functional DSP accelerator which executes similar, yet different multiple kinds of computations for DSP applications. With this type of dynamically reconfigurable DSP accelerators, the time to market reduces significantly. However, integrating multiple functionalities into a single IP often results in excessive control and area overhead. Therefore, delay and power consumption often turn out to be quite excessive. In this thesis, to reduce power consumption of dynamically reconfigurable IPs, we propose a novel fine-grained clock gating scheme, and to reduce size of dynamically reconfigurable IPs, we propose a compact multiplier-less multiplication unit where shifters and adders carry out constant multiplications.