• Title/Summary/Keyword: 선택시뮬레이션

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The Use of Computer Simulation in the Selfdischarge Evaluation of Ni/MH Battery for Electric Vehicle (전기자동차용 Ni/MH Battery의 자기방전율 평가를 위한 컴퓨터 시뮬레이션의 활용)

  • Jung Do Yang;Kim Myung Gyu;Park Seong Yong;Kim Sun Wook
    • Journal of the Korean Electrochemical Society
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    • v.4 no.2
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    • pp.53-57
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    • 2001
  • When an EV is parked for a long period time, the battery capacity naturally decreases due to selfdischarge. Therefore, this effect must be considered for the accurate measurement of the state of charge of EV battery. Battery selfdischarge simulations using the design of experiments among computer simulation methods are compared with experimental data for Ni/MH batteries for electric vehicles. The motivation is to predict the selfdischarge rate of the battery for electric vehicle at all temperature conditions and standing time when electric vehicle could be operated. We developed a general equation representing the seudischarge rate of the electric vehicle battery using design of experiments, and the equation is determined by temperature and standing time of the battery. We selected Ni/MH battery, 12 V-95 Ah, for pure electric vehicle for this study. ID develop the equation using design of experiments we selected temperature range of $-20^{\circ}~30^{\circ}C$ and standing time of 1 day$\~15$ days. We conducted several selfdischarge tests of Ni/MH battery to verify the integrity of the equation. The results showed that the computation values were in good agreement with experimental data.

Design of a 5.8 GHz Broad Band-Pass Filter with Second of Harmonics Suppression Using the Open Stubs (2차 고조파가 억제된 5.8 GHz 광대역 개방형 스터브 대역 통과 여파기 설계)

  • Choi, Young-Gu;Kim, Bok-Ki
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.18 no.10
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    • pp.1107-1116
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    • 2007
  • In this paper, a broadband open stubs band pass filters which can suppress the second harmonics using Z-transform technique, is designed, fabricated and characterized. The proposed broadband filters integrate the band stop filter with the FSCS structure and ${\lambda}_g/4$ open stub in order to suppress the second harmonics. Due to insertion of BSF at input and output terminal, the size of the filter was increased in the conventional filter, however, in the proposed structure, the position of inverter that connects the stubs can be integrated between those stubs, thereby decreasing the size. So, it can be fabricated in the size of $18.7{\times}16.9mm^2$ which is smaller size than conventional one. The measured results of the proposed filters have center frequency of a 5.8 GHz with bandwidth of 95 %, insertion loss of 0.6 dB, return loss of 14 dB. The simulation results are consistent with measurement results. The filter is designed far X-band satellite communication and ITS applications.

A Study on Fatigue Characteristic of Stent Using Finite Element Analysis (나이티놀 와이어 스텐트의 피로도 특성에 대한 유한요소 해석)

  • Kim, Han-Ki;Shin, Il-Gyun;Kim, Dong-Gon;Kim, Seong-Hyeon;Lee, Ju-Ho;Ki, Byoyng-Yun;Suh, Tae-Suk;Kim, Sang-Ho
    • Progress in Medical Physics
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    • v.20 no.3
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    • pp.119-124
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    • 2009
  • Stents are frequently used throughout the human body. They keep pathways open in vascular or nonvascular duct for a long time. Therefore its stability is very important factor. In recent years, aconsiderable amount of research has been carried out in order to estimate mechanical properties of the stent such as expansion pressure behavior, radial recoil and longitudinal recoil using FEM (Finite element analyses). However, published works on simulation of stent fatigue behavior using FEM are relatively rare. In this paper, a nonlinear finite-element methodwas employed to analyses the compression of a stent using external pressure and fatigue behavior. Finite element analyses for the stent system were performed using NASTRAN FX. In conclusion this paper shows how the stent is behaved in the body, and its fatigue behavior.

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A Fast Multipoint-to-Point LSP Traffic Engineering for Differentiated Service in MPLS Networks (MPLS 망에서 차별화 된 서비스를 제공하기 위한 빠른 Multipoint-to-Point LSP 결정 방식)

  • Kim, Seong-Gwan;Jo, Yeong-Jong
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.39 no.5
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    • pp.232-242
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    • 2002
  • In a MPLS(Multiprotocol Label Switching) network, it is important to reduce the number of labels and LSP(Lable Switched Path)s for network resource management. MTP(Multipoint-to-Point) LSP can be used to solve this problem. In consideration of traffic engineering, MTP LSP must be chosen to enhance the availability of network and link utilization. Also, a fast mechanism to setup MTP LSPs is required for rerouting capability against link failure. In this paper, we propose a fast MTP LSP traffic engineering of multipath MTP LSP by using a mapping of a MTP LSP upon Diffserv PHBs(Per Hop Behavior) in a Diffserv-capable MPLS network. In the proposed traffic engineering, we determine multiple MTP LSPs in a hierarchical manner according to the characteristics of different services. By using Monte-Carlo method for traffic load balancing process, it provides fast rerouting capability in case of frequent link failure across large network. Out method produces to be nearly optimal within reasonable run-times. It's time complexity is in O( Cn$^2$logn) as conventional multipath routing and it is much faster than Linear Programming approach. Simulation results show that the proposed traffic engineering can be controlled effectively in an administrative manner and enhance the availability of network in comparison with conventional multipath routing.

Dynamic-Response-Free SMPS Using a New High-Resolution DPWM Generator Based on Switched-Capacitor Delay Technique (Switched-Capacitor 지연 기법의 새로운 고해상도 DPWM 발생기를 이용한 Dynamic-Response-Free SMPS)

  • Lim, Ji-Hoon;Park, Young-Kyun;Wee, Jae-Kyung;Song, In-Chae
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.49 no.1
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    • pp.15-24
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    • 2012
  • In this paper, we suggest the dynamic-response-free SMPS using a new high-resolution DPWM generator based on switched-capacitor delay technique. In the proposed system, duty ratio of DPWM is controlled by voltage slope of an internal capacitor using switched-capacitor delay technique. In the proposed circuit, it is possible to track output voltage by controlling current of the internal capacitor of the DPWM generator through comparison between the feedback voltage and the reference voltage. Therefore the proposed circuit is not restricted by the dynamic-response characteristic which is a problem in the existing SMPS using the closed-loop control method. In addition, it has great advantage that ringing phenomenon due to overshoot/undershoot does not appear on output voltage. The proposed circuit can operate at switching frequencies of 1MHz~10MHz using internal operating frequency of 100 MHz. The maximum current of the core circuit is 2.7 mA and the total current of the entire circuit including output buffer is 15 mA at the switching frequency of 10 MHz. The proposed circuit has DPWM duty ratio resolution of 0.125 %. It can accommodate load current up to 1 A. The maximum ripple of output voltage is 8 mV. To verify operation of the proposed circuit, we carried out simulation with Dongbu Hitek BCD $0.35{\mu}m$ technology parameter.

Performance Analysis of the Amplify-and-Forward Scheme under Interference Constraint and Physical Layer Security (물리 계층 보안과 간섭 제약 환경에서 증폭 후 전송 기법의 성능 분석)

  • Pham, Ngoc Son;Kong, Hyung-Yun
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.14 no.1
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    • pp.179-187
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    • 2014
  • The underlay protocol is a cognitive radio method in which secondary or cognitive users use the same frequency without affecting the quality of service (QoS) for the primary users. In addition, because of the broadcast characteristics of the wireless environment, some nodes, which are called eavesdropper nodes, want to illegally receive information that is intended for other communication links. Hence, Physical Layer Security is applied considering the achievable secrecy rate (ASR) to prevent this from happening. In this paper, a performance analysis of the amplify-and-forward scheme under an interference constraint and Physical Layer Security is investigated in the cooperative communication mode. In this model, the relays use an amplify-and- forward method to help transmit signals from a source to a destination. The best relay is chosen using an opportunistic relay selection method, which is based on the end-to-end ASR. The system performance is evaluated in terms of the outage probability of the ASR. The lower and upper bounds of this probability, based on the global statistical channel state information (CSI), are derived in closed form. Our simulation results show that the system performance improves when the distances from the relays to the eavesdropper are larger than the distances from the relays to the destination, and the cognitive network is far enough from the primary user.

Ciphering Scheme and Hardware Implementation for MPEG-based Image/Video Security (DCT-기반 영상/비디오 보안을 위한 암호화 기법 및 하드웨어 구현)

  • Park Sung-Ho;Choi Hyun-Jun;Seo Young-Ho;Kim Dong-Wook
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.42 no.2 s.302
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    • pp.27-36
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    • 2005
  • This thesis proposed an effective encryption method for the DCT-based image/video contents and made it possible to operate in a high speed by implementing it as an optimized hardware. By considering the increase in the amount of the calculation in the image/video compression, reconstruction and encryption, an partial encryption was performed, in which only the important information (DC and DPCM coefficients) were selected as the data to be encrypted. As the result, the encryption cost decreased when all the original image was encrypted. As the encryption algorithm one of the multi-mode AES, DES, or SEED can be used. The proposed encryption method was implemented in software to be experimented with TM-5 for about 1,000 test images. From the result, it was verified that to induce the original image from the encrypted one is not possible. At that situation, the decrease in compression ratio was only $1.6\%$. The hardware encryption system implemented in Verilog-HDL was synthesized to find the gate-level circuit in the SynopsysTM design compiler with the Hynix $0.25{\mu}m$ CMOS Phantom-cell library. Timing simulation was performed by Verilog-XL from CadenceTM, which resulted in the stable operation in the frequency above 100MHz. Accordingly, the proposed encryption method and the implemented hardware are expected to be effectively used as a good solution for the end-to-end security which is considered as one of the important problems.

Study on Improvement of Target Tracking Performance for RASIT(RAdar of Surveillance for Intermediate Terrain) Using Active Kalman filter (능동형 Kalman filter를 이용한 지상감시레이더의 표적탐지능력 향상에 관한 연구)

  • Myung, Sun-Yang;Chun, Soon-Yong
    • Journal of the Institute of Electronics Engineers of Korea SC
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    • v.46 no.3
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    • pp.52-58
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    • 2009
  • If a moving target has a linear characteristics, the Kalman filter can estimate relatively accurate the location of a target, but this performance depends on how the dynamic status characteristics of the target is accurately modeled. In many practical problems of tracking a maneuvering target, a simple kinematic model can fairly accurately describe the target dynamics for a wide class of maneuvers. However, since the target can exhibit a wide range of dynamic characteristics, no fixed SKF(Simple Kalman filter) can be matched to estimate, to the required accuracy, the states of the target for every specific maneuver. In this paper, a new AKF(Active Kalman filter) is proposed to solve this problem The process noise covariance level of the Kalman filter is adjusted at each time step according to the study result which uses the neural network algorithm. It is demonstrated by means of a computer simulation that the tracking capability of the proposed AKF(Active Kalman filter) is better than that of the SKF(Simple Kalman Filter).

High Performance SoC On-chip-bus Architecture with Multiple Channels and Simultaneous Routing (다중 채널과 동시 라우팅 기능을 갖는 고성능 SoC 온 칩 버스 구조)

  • Lee, Sang-Hun;Lee, Chan-Ho
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.44 no.4
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    • pp.24-31
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    • 2007
  • Up to date, a lot of bus protocol and bus architecture are released though most of them are based on the shared bus architecture and inherit the limitation of performance. SNP (SoC Network Protocol), and hence, SNA (SoC Network Architecture) which are high performance on-chip-bus protocol and architecture, respectively, have been proposed to solve the problems of the conventional shared bus. We refine the SNA specification and improve the performance and functionality. The performance of the SNA is improved by supporting simultaneous routing for bus request of multiple masters. The internal routing logic is also improved so that the gate count is decreased. The proposed SNA employs XSNP (extended SNP) that supports almost perfect compatibility with AMBA AHB protocol without performance degradation. The hardware complexity of the improved SNA is not increased much by optimizing the current routing logic. The improved SNA works for IPs with the original SNP at its best performance. In addition, it can also replace the AMBA AHB or interconnect matrix of a system, and it guarantees simultaneous multiple channels. That is, the existing AMBA system can show much improved performance by replacing the AHB or the interconnect matrix with the SNA. Thanks to the small number of interconnection wires, the SNA can be used for the off-chip bus system, too. We verify the performance and function of the proposed SNA and XSNP simulation and emulation.

A Novel Globally Asynchronous, Locally Dynamic System Bus Architecture Based on Multitasking Bus (다중처리가 가능한 새로운 Globally Asynchronous, Locally Dynamic System 버스 구조)

  • Choi, Chang-Won;Shin, Hyeon-Chul;Wee, Jae-Kyung
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.45 no.5
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    • pp.71-81
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    • 2008
  • In this paper, we propose a novel Globally Asynchronous, Locally Dynamic System(GALDS) bus and demonstrate its performance. The proposed GALDS bus is the bidirectional multitasking bus with the segmented bus architecture supporting the concurrent operation of multi-masters and multi-slaves. By analyzing system tasks, the bus architecture chooses the optimal frequency for each If among multiples of bus frequency and thus we can reduce the overall power consumption. For efficient data communications between IPs operating in different frequencies, we designed an asynchronous and bidirectional FIFO based on an asynchronous wrapper with hand-shaking interface. In addition, since systems can be easily expandable by inserting bus segments, the proposed architecture has advantages in IP reusability and structural flexibility As a test example, a four-segment bus haying four masters and four slaves were designed by using Verilog HDL. We demonstrate multitasking operations with read/write data transfers by simulation when the ratios of operation frequency are 1:1, 1:2, 1:4 and 1:8. The data transfer mode is a 16 burst increment mode compatible with Advanced Microcontroller Bus Architecture(AMBA). The maximum operation latency of the proposed GALDS bus is 22 clock cycles for the bus write operation, and 44 clock cycles for read.