• Title/Summary/Keyword: 비실리콘MEMS

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Design of Silicon MEMS Package for CPW MMICs (CPW MMIC 칩 실장을 위한 실리콘 MEMS 패키지 설계)

  • Kim, Jin-Yang;Kim, Sung-Jin;Lee, Hai-Young
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.39 no.11
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    • pp.40-46
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    • 2002
  • A MEMS(Micro Electro Mechanical System) package using a doped-silicon(Si) carrier for coplanar microwave and millimeter-wave integrated circuits is proposed in order to reduce parasitic problems of leakage, coupling and resonance. The proposed carrier scheme is verified by fabrication and measuring a GaAs CPW(Coplanar Waveguide) on the three types of Si-carriers(gold-plated high resistivity, lightly doped, high resistivity). The proposed MEMS package using the lightly doped(15 ${\Omega}{\cdot}$) Si-carrier shows parasitic-free performance since the lossy Si-carrier effectively absorbs and suppresses the resonant leakage.

Nano-bending method for the measurement of the Poisson's ratio of MEMS thin films (MEMS 박막의 푸와송 비 측정을 위한 미소굽힘기법)

  • 김종훈;김정길;연순창;전윤광;한준희;이호영;김용협
    • Journal of the Korean Society for Aeronautical & Space Sciences
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    • v.31 no.2
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    • pp.57-62
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    • 2003
  • Nano-bending method is presented to measure the Poisson's ratio of thinfilms for MEMS (Micro-Electro-Mechanical Systems) applicaiton. The douvle-ring specimen is designed and fabricated based on the surface micromachining process to facilitate the measurement of the Poisson's ratio. The Poisson's ratio can be obtained through analyzing the linear load-displacement relationship of the double ring specimen subjected to nano-indenter loading. The Present nano-bending mehod is an in-situ measurement approach due to the compatibility to the surface micromachining process. The Poisson's ratio is locally obtained at the location of the double ring specimen with micro dimension. To validate the nano-bending method, the Poisson's ratio of LPCVD (Low Pressure Chemical Vapor Deposition) poly-silicon with thickness of 2.3㎛ is investigated. Experimental results reveal that the Poisson's ratio of the poly-silicon film is 0.2569. The standard deviation of the nano-bending measurement for the stiffness of double ring specimens is 2.66%.

Surface Characteristics of Silicon Substrates Coated with Self-assembled Mono-layers (자체조립 단일막으로 코팅된 실리콘 기판의 표면특성)

  • 최성훈;강호종
    • Polymer(Korea)
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    • v.28 no.1
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    • pp.3-9
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    • 2004
  • Silane modified perfluoropolyethers (SPFPE) was synthesized as a self-assembled mono-layers (SAMs) thin film for micro-electro mechanical system (MEMS). SPFPE was compared to the Perfluoropolyethers (PFPE) as well as octadecyltrichlorosilane (OTS) and perfluorooctyltrichlorosilane (FOTS) with respect to the development of hydrophobicity in the SAMs surface. SPFPE shows less hydrophobicity than those of OTS and FOTS. Thermal annealing of SPFPE SAMs resulted in the enhancement of hydrophobicity as much as those of OTS and FOTS. The SAMs formed from SPFPE were found to be similar as OTS and FOTS SAMs with smooth R$\sub$a/ values of 0.3 nm. However, the flexible chain mobility of SPFPE resulted in 50% reduction as much as the fiction force in OTS.

Surface Characteristics of Silicon Substrates Coated with Octadecyltrichlorosilane (옥타데실트리클로로실란 코팅에 의한 실리콘 표면 특성 변화)

  • 유희재;김수경;김진홍;강호종
    • Polymer(Korea)
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    • v.27 no.6
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    • pp.555-561
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    • 2003
  • The self-assembled monolayer coating of octadecyltrichlorosilane (OTS) on the silicon based MEMS was investigated and surface characteristics were considered as a function of coating conditions and reagent composition. The sulfuric peroxide mixture (SPM) solution was used to form -OH group which caused the hydrophilic characteristic on silicon surftce. Highest hydrophilicity was obtained by SPM solution with 85% acid content at room temperature. OTS was applied on the silicon surface by means of self-assembled monolayers (SAMs) coating. It was found that sol-gel reaction was took place between -OH group on the silicon surface and -Cl group in OTS. As a result, the contact angle increased due to the increase of hydrophobicity by Si-O bonding of SAMs. Sol-gel reaction could be controlled by coating conditions as well as reagent composition in OTS coating solution.

Characterization of Deep Dry Etching of Silicon Single Crystal by HDP (HDP를 이용한 실리콘 단결정 Deep Dry Etching에 관한 특성)

  • 박우정;김장현;김용탁;백형기;서수정;윤대호
    • Journal of the Korean Ceramic Society
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    • v.39 no.6
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    • pp.570-575
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    • 2002
  • The present tendency of electrical and electronics is concentrated on MEMS devices for advantage of miniaturization, intergration, low electric power and low cost. Therefore it is essential that high aspect ratio and high etch rate by HDP technology development, so that silicon deep trench etching reactions was studied by ICP equipment. Deep trench etching of silicon was investigated as function of platen power, etch step time of etch/passivation cycle time and SF$\_$6/:C$_4$F$\_$8/ flow rate. Their effects on etch profile, scallops, etch rate, uniformity and selectivity were also studied.

MEMS Fabrication of Microchannel with Poly-Si Layer for Application to Microchip Electrophoresis (마이크로 칩 전기영동에 응용하기 위한 다결정 실리콘 층이 형성된 마이크로 채널의 MEMS 가공 제작)

  • Kim, Tae-Ha;Kim, Da-Young;Chun, Myung-Suk;Lee, Sang-Soon
    • Korean Chemical Engineering Research
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    • v.44 no.5
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    • pp.513-519
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    • 2006
  • We developed two kinds of the microchip for application to electrophoresis based on both glass and quartz employing the MEMS fabrications. The poly-Si layer deposited onto the bonding interface apart from channel regions can play a role as the optical slit cutting off the stray light in order to concentrate the UV ray, from which it is possible to improve the signal-to-noise (S/N) ratio of the detection on a chip. In the glass chip, the deposited poly-Si layer had an important function of the etch mask and provided the bonding surface properly enabling the anodic bonding. The glass wafer including more impurities than quartz one results in the higher surface roughness of the channel wall, which affects subsequently on the microflow behavior of the sample solutions. In order to solve this problem, we prepared here the mixed etchant consisting HF and $NH_4F$ solutions, by which the surface roughness was reduced. Both the shape and the dimension of each channel were observed, and the electroosmotic flow velocities were measured as 0.5 mm/s for quartz and 0.36 mm/s for glass channel by implementing the microchip electrophoresis. Applying the optical slit with poly-Si layer provides that the S/N ratio of the peak is increased as ca. 2 times for quartz chip and ca. 3 times for glass chip. The maximum UV absorbance is also enhanced with ca. 1.6 and 1.7 times, respectively.

Profile control of high aspect ratio silicon trench etch using SF6/O2/BHr plasma chemistry (고종횡비 실리콘 트랜치 건식식각 공정에 관한 연구)

  • 함동은;신수범;안진호
    • Proceedings of the Materials Research Society of Korea Conference
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    • 2003.11a
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    • pp.69-69
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    • 2003
  • 최근 trench capacitor, isolation trench, micro-electromechanical system(MEMS), micro-opto-electromechanical system(MOEMS)등의 다양한 기술에 적용될 고종횡비(HAR) 실리콘 식각기술연구가 진행되어 지고 있다. 이는 기존의 습식식각시 발생하는 결정방향에 따른 식각률의 차이에 관한 문제와 standard reactive ion etching(RIE) 에서의 낮은 종횡비와 식각률에 기인한 문제점들을 개선하기 위해 고밀도 플라즈마를 이용한 건식식각 장비를 사용하여 고종횡비(depth/width), 높은 식각률을 가지는 이방성 트랜치 구조를 얻는 것이다. 초기에는 주로 HBr chemistry를 이용한 연구가 진행되었는데 이는 식각률이 낮고 많은양의 식각부산물이 챔버와 시편에 재증착되는 문제가 발생하였다. 또한 SF6 chemistry의 사용을 통해 식각률의 향상은 가져왔지만 화학적 식각에 기인한 local bowing과 같은 이방성 식각의 문제점들로 인해 최근까지 CHF3, C2F6, C4F8, CF4등의 첨가가스를 이용하여 측벽에 Polymer layer의 식각보호막을 형성시켜 이방성 구조를 얻는 multi_step 공정이 일반화 되었다. 이에 본 연구에서는 SF6 chemistry와 소량의 02/HBr의 첨가가스를 이용한 single_step 공정을 통해 공정의 간소화 및 식각 프로파일을 개선하여 최적의 HAR 실리콘 식각공정 조건을 확보하고자 하였다.

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Properties and Electrical Characterization by Materials md the number of Times of Sol Coating of PBT Thick Film for Biochip (바이오칩 응용을 위한 저온 소결형 PZT 후막의 졸 코팅 재료와 횟수에 따른 물성 및 전기적 특성)

  • Park, Jae-Hong;Son, Jin-Ho;Kim, Tae-Song;Hwang, Jae-Seop;Park, Hyeong-Ho;Kim, Hwan
    • Proceedings of the Materials Research Society of Korea Conference
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    • 2003.11a
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    • pp.139-139
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    • 2003
  • 많은 압전 후막은 여러 감지소자, 통신 및 사무자동화 기기, 전기 및 전자부품, 의료장비 및 국방산업에 까지 널리 응용되어 왔다. 그 중에서도 압전특성이 뛰어난 PZT 후막은 마이크로 펌프, 밸브, 헤드, 모터, 트랜스듀서 뿐 아니라 최근 바이오칩용 센서와 액추에이터로서 널리 연구되고 있다. 또한 마이크로 센서와 액추에이터 의 제작 및 구동을 위한 MEMS 기술의 도입으로 실리콘 베이스의 소자 개발이 집중되고 있다. 스크린 프린팅 방법은수 마이크론에서 수십 마이크론 후막의 실현이 용이하고 비교적 경제적이며 소자신뢰도가 높고 대량생산에 유리하여 활발한 연구가 진행 중이다. 그러나 후막은 벌크에 비해 기공률이 높고, 또 소자응용에 있어서 고온소결 시 MEMS공정을 위한 실리콘 베이스 기판과의 확산 및 반응에 의 한 계면 및 활물질 성능의 저하가 문제가 되고 있다. 따라서 본 연구에서는 스크린 프린팅과 더불어 졸 코팅 방법의 도입으로 후막의 성형 및 소결 밀도를 높임과 동시에 여러 확산 방지 막의 증착으로 capacitor 형 PZT 후막의 물성 및 전기 적 특성을 향상시키고자 하였다.

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Multi-functional (Temperature, Pressure, Humidity) Sensor by MEMS technology (MEMS 기술을 이용한 온도, 압력, 습도 복합 센서)

  • Kwon Sang-wook;Won Jong-Hwa
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.42 no.11
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    • pp.1-8
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    • 2005
  • In this paper, we present design and prototyping of a low-cost, integrated multi-functional micro health sensor chip that can be used or embedded in widely consumer devices, such as cell phone and PDA, for monitoring environmental condition including air pressure, temperature and humidity. This research's scope includes basic individual sensor study, architecture for integrating sensors on a chip, fabrication process compatibility and test/evaluation of prototype sensors. The results show that the integrated TPH sensor has good characteristics of ${\pm}\;1\%FS$ of linearity and hysteresis for pressure sensor and temperature sensor and of ${\pm}\;5\%FS$ of linearity and hysteresis But if we use 3rd order approximation for humidity sensor, full scale error becomes much smaller and this will be one of our future study.