• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.1
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• pp.79-85
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• 2010

In video standards such as H.264/AVC, motion estimation (ME) / compensation (MC) is regarded as a vital component in a video coder as it consumes a large amount of computation resources. The full search technique, which is used in general video codecs, gives the highest visual quality but also has the problem of significant computational load. To solve this problem, many fast algorithm has benn proposed. Among them, NPDS show that can maintain its video quality very close to the full search technique while achieving computation reduction by using a halfway-stop technique in the calculation of block distortion measure. In this paper, we proposed algorithm by determining minimum distortion measure with predictive motion vector and using the new search order. As the result, we can check that the proposed algorithm reduces the computational load 95% in average compared to the full search, respectively with the PSNR lost about 0.04dB.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.27 no.1C
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• pp.69-77
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• 2002

Sine digital signal processing for motion pictures requires huge amount of data computation to store, manipulate and transmit, more effective data compression is necessary. Therefore, the ITU-T recommended H.26x as data compression standards for digital motion pictures. The data compression method that eliminates time redundancies by motion estimation using relationship between picture frames has been widely used. Most video conding systems employ block matching algorithm for the motion estimation and compensation, and the algorithm is based on the minimun value of cast functions. Therefore, fast search algorithm rather than full search algorithm is more effective in real time low data rates encodings such as H.26x. In this paper, motion estimation employing the Nearest-Neighbors algorithm is designed to reduce search time using FPGA, coded in VHDL, and simulated and verified using Xilink Foundation.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.24 no.10A
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• pp.1571-1578
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• 1999

In this paper, we present the Modulator Channel Card and VLSI chip for the Radio Transceiver Unit (RTU) of direct sequence code division multiple access (DS-CDMA) Wireless Local Loop (WLL) System. The Modulator Channel Card is designed and implemented using ASIC's, FPGA's and DSP's. The ASIC, compliance with Common Air Interface specification proposed by ETRI, has 40K gates which is designed to operate at 32MHz, and is fabricated using $0.6\mu\textrm{m}$ CMOS process. The ASIC carries out for I- or Q- phase data channel signal processing at a time, where each data channel processing consists of channel coding, block interleaving, scrambling, Walsh modulation, Pseudo-Noise (PN) spreading, and baseband filtering. The Modulator Channel Card has been integrated as a part of RTU of WLL system and is confirmed that it meets all functional and performance requirements.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.24 no.7A
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• pp.1046-1051
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• 1999

It is well known that Parallel Concatenated Convolutional Codes(turbo codes) has a good performance for long block sizes. This thesis has analyzed the performance of turbo code which is based on voice or control frames with short frame sizes in the future mobile communication system. Also, at the similar decoding complexity, the performance of turbo code and convolutional codes in the speech/control frames, and the applicability of this system are considered. As a result, turbo code in short frame sizes present the performance of a BER of $10^{-3}$ or more over 3 iterations in the future mobile communication system. However, at a BER of $10^{-3}$ , if the same complexity is considered, the performance of rate 1/2 turbo code with K = 5 is better than that of convolutional code with K = 9 at low $E_b/N_0$, and the performance of turbo code with K = 3 is superior to that of convolutional code with K = 7. Rate 1/3 turbo code with K = 3 and 5 have similar to performance of rate 1/2 turbo code.

• Journal of The Korean Association of Information Education
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• v.19 no.4
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• pp.533-544
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• 2015

In this study, the direction for hierarchical curriculum organization about software education in Korea was suggested in terms of overall execution of software education. The international case studies especially was conducted in order to suggest the propel educational programming language for level of students in the programming activity. In terms of the international case studies, the type of programming language was examined, which is suggested to each school level as a part of required regular curriculum. Then, the direction was supposed to suggest the instructional system organization of software education for Korea through the result of case studies. The results of case studies indicated that elementary school use the block based programming language, and text based programming languages are used from middle school.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.46 no.4
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• pp.67-75
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• 2009

Multi-layered video coding that provides scalability across the visual content has emerged for easily adaptive service over current heterogeneous network. However, the network is still error prone environment so that video service may suffer packet loss or erroneous decoding of the video. Especially distortion caused by the burst error may propagate to several pictures until intra refreshing, which will raise a terrific degradation of picture quality. To overcome the problem at terminal independently, we propose a new error concealment algorithm for the multi-layered video coding. The proposed method uses the similarity of between layers in the multi-layered video coding and POCS (Projections Onto Convex Sets) which is a powerful error concealment tool, but heavily dependent on initial values. To find adequate initial value which can reduce iteration times as well as achieve high performance, we took consideration into both features of layered approach coding and the correlation in neighbor blocks. The simulation results show that the proposed concealment method works well.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.25 no.7A
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• pp.994-1004
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• 2000

In this paper, bitstreams are composed of using H.263 for a moving picture coding in the band-limited and error-prone environment such as wireless environment. EREC sub-frames are implemented by applying the proposed EREC algorithm in order to be UEP for the real data parts of implemented bitstreams. Because those are able to do resynchronization with a block unit, propagation of the error can be minimized, and the position of the important bits such as INTRADC and MVD can be known. Class is separated using the position of these important bits, and variable puncturing tables are designed by the class informations and the code rates of turbo codes are differently designed in according to the class. Channel coding used the turbo codes, and an interleaver to be designed in the turbo codes does not eliminate redundancy bits of the important bits in applying variable code rates of EREC sub-frames unit and is always the same at the transmitter and the receiver although being variable frame size. As a result of simulation, UEP with the code rate similar to EEP is obtained a improved result in the side of bit error probability. And the result of applying it to image knows that the subjective and objective quality have been improved by the protection of important bits.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.12 no.4
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• pp.1867-1875
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• 2011

In this paper, a low-area 256-point FFT structure is proposed. For low-area implementation CSD(Canonic Signed Digit) multiplier method is chosen. Because multiplication type should be less for efficient CSD multiplier application to the FFT structure, the Radix-$4^2$ algorithm is chosen for those purposes. After, in the proposed structure, the number of multiplication type is minimized in each multiplication block, the CSD multipliers are applied for implementation of multiplication. Furthermore, in CSD multiplier implementation, cell-area is more reduced through common sub-expression sharing(CSS). The Verilog-HDL coding result shows 29.9% cell area reduction in the complex multiplication part and 12.54% cell area reduction in overall 256-point FFT structure comparison with those of the conventional structure.

• Journal of Internet Computing and Services
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• v.4 no.4
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• pp.9-14
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• 2003

A GUI (graphical user interface) has been a dominant platform for HCI (human computer interaction). A GUI - based interaction has made computers simpler and easier to use. The GUI - based interaction, however, does not easily support the range of interaction necessary to meet users' needs that are natural. intuitive, and adaptive. In this paper, the modified BMA (block matching algorithm) is proposed to track a hand in a sequence of an image and to recognize it in each video frame in order to replace a mouse with a pointing device for a virtual reality. The HCI system with 30 frames per second is realized in this paper. The modified BMA is proposed to estimate a position of the hand and segmentation with an orientation of motion and a color distribution of the hand region for real - time processing. The experimental result shows that the modified BMA with the YCbCr (luminance Y, component blue, component red) color coordinate guarantees the real - time processing and the recognition rate. The hand tracking by the modified BMA can be applied to a virtual reclity or a game or an HCI system for the disable.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.23 no.7
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• pp.801-806
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• 2019

Recently, each university has been lecturing a lot on the liberal arts subject by emphasizing software education. However, students are often motivated by the difficulty of learning programming, the inability to recognize why they should learn programming, or even the fact that they do not try. The reason for the resilience is to guide programming learning to have the power to recover from the point of abandonment to proceed with the learning again. In this study, recovery elasticity pre-post-examination was conducted on the parts that learned scratches and those that learned Python. Studies have shown that while Scratch appears to be trying to accept and work harder, Python has been relatively more difficult than Scratch. It is expected that this study will help identify the factors that can sustain programming learning.