• The KIPS Transactions:PartA
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• v.18A no.4
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• pp.135-142
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• 2011

This research is to design an effective buffer structure and its management for flash memory based high performance SSDs (Solid State Disks). Specifically conventional SSDs tend to show asymmetrical performance in read and /write operations, in addition to a limited number of erase operations. To minimize the number of erase operations and write latency, the degree of interleaving levels over multiple flash memory chips should be maximized. Thus, to increase the interleaving effect, an effective buffer structure is proposed for the SSD with a hybrid address mapping scheme and super-block management. The proposed buffer operation is designed to provide performance improvement and enhanced flash memory life cycle. Also its management is based on a new selection scheme to determine random and sequential accesses, depending on execution characteristics, and a method to enhance the size of sequential access unit by aggressive merging. Experiments show that a newly developed mapping table under the MBA is more efficient than the basic simple management in terms of maintenance and performance. The overall performance is increased by around 35% in comparison with the basic simple management.

• Journal of Dental Rehabilitation and Applied Science
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• v.37 no.4
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• pp.177-185
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• 2021

Clinical applications of translucent zirconia as well as traditional zirconia (3 mol% yttria stabilized tetragonal zirconia polycrystal, 3Y-TZP) are increasing. For this reason, studies on factors affecting the optical properties of dental zirconia have been continuously reported. The optical effect of dental zirconia may vary depending on the yttria content, the thickness of the prosthesis, the sintering process, polishing, glazing and cementation in laboratory and clinical procedures. Increasing the yttria concentration can reduce the masking effect. Translucency decreases as the thickness of the restoration increases, but the required thickness may vary depending on the properties of the zirconia block. The high-speed sintering method can shorten the manufacturing time, but in some cases, the translucency of the prosthesis may decrease. In addition, the optical properties can be affected by the surface roughness of zirconia and the polishing process. The use of an appropriate colored cement can help with the masking effect of zirconia and can be useful for color matching for more esthetic results.

• Journal of KIISE:Computing Practices and Letters
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• v.14 no.4
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• pp.412-429
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• 2008

As the amount of electronic documents increases rapidly with the growth of the Internet, a parallel search engine capable of handling a large number of documents are becoming ever important. To implement a parallel search engine, we need to partition the inverted index and search through the partitioned index in parallel. There are two methods of partitioning the inverted index: 1) document-identifier based partitioning and 2) keyword-identifier based partitioning. However, each method alone has the following drawbacks. The former is convenient in inserting documents and has high throughput, but has poor performance for top h query processing. The latter has good performance for top-k query processing, but is inconvenient in inserting documents and has low throughput. In this paper, we propose a hybrid partitioning method to compensate for the drawback of each method. We design and implement a parallel search engine that supports the hybrid partitioning method using the Odysseus DBMS tightly coupled with information retrieval capability. We first introduce the architecture of the parallel search engine-Odysseus/parallel-OOSQL. We then show the effectiveness of the proposed system through systematic experiments. The experimental results show that the query processing time of the document-identifier based partitioning method is approximately inversely proportional to the number of blocks in the partition of the inverted index. The results also show that the keyword-identifier based partitioning method has good performance in top-k query processing. The proposed parallel search engine can be optimized for performance by customizing the methods of partitioning the inverted index according to the application environment. The Odysseus/parallel OOSQL parallel search engine is capable of indexing, storing, and querying 100 million web documents per node or tens of billions of web documents for the entire system.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.8
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• pp.22-30
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• 2009

Due to high levels of integration and complexity, the Network-on-Chip (NoC) approach has emerged as a new design paradigm to overcome on-chip communication issues and data bandwidth limits in conventional SoC(System-on-Chip) design. In particular, exponentially growing of energy consumption caused by high frequency, synchronization and distributing a single global clock signal throughout the chip have become major design bottlenecks. To deal with these issues, a globally asynchronous, locally synchronous (GALS) design combined with low power techniques is considered. Such a design style fits nicely with the concept of voltage-frequency-islands (VFI) which has been recently introduced for achieving fine-grain system-level power management. In this paper, we propose an efficient design methodology that minimizes energy consumption by VFI partitioning on an NoC architecture as well as assigning supply and threshold voltage levels to each VFI. The proposed algorithm which find VFI and appropriate core (or processing element) supply voltage consists of traffic-aware core graph partitioning, communication contention delay-aware tile mapping, power variation-aware core dynamic voltage scaling (DVS), power efficient VFI merging and voltage update on the VFIs Simulation results show that average 10.3% improvement in energy consumption compared to other existing works.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.8
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• pp.102-116
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• 2009

There have been lots of researches for H.264/AVC performance enhancement on a multi-core processor. The enhancement has been performed through parallelization methods. Parallelization methods can be classified into a task-level parallelization method and a data level parallelization method. A task-level parallelization method for H.264/AVC decoder is implemented by dividing H.264/AVC decoder algorithms into pipeline stages. However, it is not suitable for complex and large bitstreams due to poor load-balancing. Considering load-balancing and performance scalability, we propose a horizontal data level parallelization method for H.264/AVC decoder in such a way that threads are assigned to macroblock lines. We develop a mathematical performance expectation model for the proposed parallelization methods. For evaluation of the mathematical performance expectation, we measured the performance with JM 13.2 reference software on ARM11 MPCore Evaluation Board. The cycle-accurate measurement with SoCDesigner Co-verification Environment showed that expected performance and performance scalability of the proposed parallelization method was accurate in relatively high level

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.8 no.4
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• pp.532-538
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• 1998

Emerald ($3BeO{\cdot}Al_2O_3{\cdot}6SiO_2:Cr^{3+}$) single crystal was grown by temperature gradient reflux method with using Korean natural beryl. The flux of lithium-molibudenium-vanadium oxide system was made by means of mixing the 2 sort of flux which were differently melted $Mo_3-Li_2O$ and $V_2O_5-Li_2O$ each other. The optimum composition of flux was 3 mole ratio of molibudenium. vanadium oxides to lithium oxide ($(MoO_3+V_2O_5)/Li_2O$), flux additives were substituted more less then 0.2 mole% of $K_2O$ or $Na_2O$ to the $Li_2O$ amount. The melting concentration of mixing beryl material was 3~10% content to the flux, that of $Cr_2O_3$ color dopant was 1% to the beryl amount. In the crystal growing apparatus with temperature gradient in the 3 zone furnace which was separated into the block of melt, growth and return, the solution have got to circulate continuously between $1100^{\circ}C$ and $1000^{\circ}C$ in steady state. When thermal fluctuation was treated to during 2 hrs once on a day at 950~$1000^{\circ}C$ in growth zone, the supersaturation solution was maintained, controled and emerald single crystal can be grown large crystal which was prevented from the nucleation of microcrystallite. The preferencial growth direction of hexagonal columnar emerald single crystal was the c(0001) plane of botton side and vertical to the m(1010) plane of post side.

• Journal of the Institute of Electronics and Information Engineers
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• v.49 no.12
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• pp.201-208
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• 2012

In this paper, the hardware design of rate control for real-time video encoded is proposed. In the proposed method, a quadratic rate distortion model with high-computational complexity is not used when quantization parameter values are being decided. Instead, for low-computational complexity, average complexity weight values of frames are used to calculate QP. For high speed and low computational prediction, the MAD is predicted based on the coded basic unit, using spacial and temporal correlation in sequences. The rate control is designed with the hardware for fast QP decision. In the proposed method, a quadratic rate distortion model with high-computational complexity is not used when quantization parameter values are being decided. Instead, for low-computational complexity, average complexity weight values of frames are used to calculate QP. In addition, the rate control is designed with the hardware for fast QP decision. The execution cycle and gate count of the proposed architecture were reduced about 65% and 85% respectively compared with those of previous architecture. The proposed RC was implemented using Verilog HDL and synthesized with UMC $0.18{\mu}m$ standard cell library. The synthesis result shows that the gate count of the architecture is about 19.1k with 108MHz clock frequency.

• Korean Journal of Head & Neck Oncology
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• v.12 no.2
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• pp.169-176
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• 1996

Tuberculous cervical lymphadenitis is still an important cause of neck mass in Korea. Tuberculosis is an important differential diagnosis in patients of cervical lymphadenopathy. Rapid and sensitive test for the diagnosis of tuberculosis is essential for the approapiate treatment. Up to now, conventional diagnostic methods for M. tuberculosis were acid-fast bacilli(AFB) stain and culture of M. tuberculosis. The direct microscopic examination of AFB by Ziehl-Neelsen stain is rapid, but often negative. The culture for M. tuberculosis is time-consuming, taking 4 to 8 weeks. Recently various methods to detect Mycobacterial DNA, including PCR and restriction fragment length polymorphism(RFLP) analysis have been reported. Here we represent a simple method for the confirmation of M. tuberculosis and exclusion of the other Mycobacterial species by RFLP analysis and silver staining of polyacrylamide gel electrophoresis after nested PCR for a repetitive DNA sequence(IS986) specific for M. tuberculosis from fresh or paraffin-embedded biopsy specimens. This result leads us to conclude that this method is simple, rapid and possibly applicable to confirm M. tuberculosis and rule out the other Mycobacteria species from the clinical specimens in the clinical laboratories.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.30 no.4A
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• pp.336-344
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• 2005

Discrete Wavelet Transform(DWT) is the oncoming generation of compression technique that has been selected for MPEG4 and JEPG2000, because it has no blocking effects and efficiently determines frequency property of temporary time. In this paper, we propose an efficient bit-serial architecture for the low-power and low-complexity DWT filter, employing two-channel QMF(Qudracture Mirror Filter) PR(Perfect Reconstruction) lattice filter. The filter consists of four lattices(filter length=8) and we determine the quantization bit for the coefficients by the fixed-length PSNR(peak-signal-to-noise ratio) analysis and propose the architecture of the bit-serial multiplier with the fixed coefficient. The CSD encoding for the coefficients is adopted to minimize the number of non-zero bits, thus reduces the hardware complexity. The proposed folded 1D DWT architecture processes the other resolution levels during idle periods by decimations and its efficient scheduling is proposed. The proposed architecture requires only flip-flops and full-adders. The proposed architecture has been designed and verified by VerilogHDL and synthesized by Synopsys Design Compiler with a Hynix 0.35$\mu$m STD cell library. The maximum operating frequency is 200MHz and the throughput is 175Mbps with 16 clock latencies.

• Journal of KIISE:Computer Systems and Theory
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• v.35 no.2
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• pp.94-101
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• 2008

Non-volatile RAM (NVRAM) is a form of next-generation memory that has both characteristics of nonvolatility and byte addressability each of which can be found in nonvolatile storage and RAM, respectively. The advent of NVRAM may possibly bring about drastic changes to the system software landscape. When NVRAM is efficiently exploited in the system software layer, we expect that the system performance can be significantly improved. In this regards, we attempt to develop a new Flash file system, named MiNVFS (Metadata in NVram File System). MiNVFS maintains all the metadata in NVRAM, while storing all file data in Flash memory. In this paper, we present quantitative experimental results that show how much performance gains can be possible by exploiting NVRAM. Compared to YAFFS, a typical Flash file system, we show that MiNVFS requires only minimal time for mounting. MiNVFS outperforms YAFFS by an average of around 400% in terms of the total execution time for the realistic workloads that we considered.