• Journal of the Korean Chemical Society
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• v.52 no.4
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• pp.387-393
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• 2008

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2006.05a
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• pp.769-772
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• 2006

본 논문에서는 기존의 관용알고리즘을 비교 분석하고, 유무선 복합 통신망에서의 고속화를 위해 요구되는 암호알고리즘을 비교 분석한다. 기존에 사용되고 있는 블록 알고리즘의 경우, 고비도에 의해서 소프트웨어적 혹은 하드웨어적으로 설계하였을 경우, 현재의 이동통신망에 사용을 하였을 경우, 속도의 차이에 의해 사용이 불가능하다. 따라서, 본 논문에서는 이동통신 환경망에 적합한 블록알고리즘을 제안하고 분석하고자 한다.

• Proceedings of the Korea Multimedia Society Conference
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• 2004.05a
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• pp.238-242
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• 2004

운송 컨테이너의 식별자를 추출하는 것은 컨테이너 식별자들의 크기나 위치가 정형화되어 있지 않고 외부의 잡음으로 인하여 식별자의 형태가 훼손되어 있기 때문에 어렵다. 본 논문에서는 이러한 특성을 고려하여 컨테이너 영상에 대해 Canny 마스크를 이용하여 에지를 검출하고, 검출된 에지 정보에서 영상획득 시 외부 광원에 의해 수직으로 길게 발생하는 잡음들을 퍼지추론 방법을 적용하여 제거한 후에 수직 블록과 수평 블록을 검출하여 컨테이너의 식별자 영역을 추출한다. 추출된 컨테이너의 식별자 영역에서 히스토그램 방법과 윤곽선 추적 알고리즘을 각각 이용하여 개별 식별자를 추출한다. 실제 컨테이너 영상을 대상으로 실험 결과, 제안된 컨테이너 식별자 추출 방법이 다양한 컨테이너 영상에 대해 효율적인 것을 확인하였다.

• Journal of KIISE:Computer Systems and Theory
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• v.27 no.5
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• pp.529-539
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• 2000

This paper proposes a prefetch-based disk buffer management algorithm, which we call W2R (Veighingjwaiting Room). Instead of using elaborate prefetching schemes to decide which blockto prefetch and when, we simply follow the LRU-OBL (One Block Lookahead) approach and prefetchthe logical next block along with the block that is being referenced. The basic difference is that theW2R algorithm logically partitions the buffer into two rooms, namely, the Weighing Room and theWaiting Room. The referenced, hence fetched block is placed in the Weighing Room, while theprefetched logical next block is placed in the Waiting Room. By so doing, we alleviate some inherentdeficiencies of blindly prefetching the logical next block of a referenced block. Specifically, a prefetchedblock that is never used may replace a possibly valuable block and a prefetched block, thoughreferenced in the future, may replace a block that is used earlier than itself. We show through tracedriven simulation that for the workloads and the environments considered the W2R algorithm improvesthe hit rate by a maximum of 23.19 percentage points compared to the 2Q algorithm and a maximumof 10,25 percentage feints compared to the LRU-OBL algorithm.

• Journal of IKEEE
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• v.19 no.1
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• pp.10-17
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• 2015

In this Paper, an efficient method of FPGA based design and implementation of Sobel Edge detector block using 3-Line buffers is presented. The FPGA provides the proper and sufficient hardware for image processing algorithms with flexibility to support Sobel edge detection algorithm. A pipe-lined method is used to implement the edge detector. The proposed Sobel edge detection operator is an model using of Finite State Machine(FSM) which executes a matrix mask operation to determine the level of edge intensity through different of pixels on an image. This approach is useful to improve the system performance by taking advantage of efficient look up tables, flip-flop resources on target device. The proposed Sobel detector using 3-line buffers is synthesized with Xilinx ISE 14.2 and implemented on Virtex II xc2vp-30-7-FF896 FPGA device. Using matlab, we show better PSNR performance of proposed design in terms of 3-Line buffers utilization.

• Polymer(Korea)
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• v.28 no.6
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• pp.509-518
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• 2004

Microdomain structures and crystallization behavior of the binary blends consisting of an asymmetric block copolymer and a homopolymer were investigated using small-angle X-ray scattering (SAXS), optical micro scope (OM) and differential scanning calorimetry (DSC). Poly(methyl methacrylate)-block-polystyrene block copolymer (PMMA-b-PS) (weight fraction of PMMA =0.53) was mixed with low molecular weight poly(vinylidene fluoride) (PVDF). As the PVDF concentration was increased, the morphological change from a lamellar to a cylindrical structure occurred. The crystallization of PVDF significantly disturbed the orientation of the pre-existing microdomain structure, resulting in a poorly ordered morphology. In the blends, PVDF exhibited unique crystallization behavior due to the PMMA block which is preferentially miscible to PVDF and the space constraint imposed by the microdomains.

• The Journal of the Korea Contents Association
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• v.18 no.12
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• pp.229-237
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• 2018

This paper considers effective timetable modules in order to easily satisfy various user requirements during scheduling timetables in universities. Noticing that the methods for allocating time blocks change according to the timetable modules, we suggest six models of symmetric timetable modules composed of 4 blocks, and show that our models have more benefits without any loss from the viewpoint of customers, if the suppliers consider the decreasing upper bound of ratio utilizing space resources. By adapting a concept of potentially determined blocks and suggesting their management strategies, finally, we accomplish a method for supporting flexibility and controllability when the universities timetables are scheduled.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.26 no.4
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• pp.533-540
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• 2022

Specialists diagnose skin cancer using a dermatoscopy to detect skin cancer as early as possible, but it is difficult to determine accurate skin lesions because skin lesions have various shapes. Recently, the skin lesion segmentation method using deep learning, which has shown high performance, has a problem in segmenting skin lesions because the boundary between healthy skin and skin lesions is not clear. To solve these issues, the proposed method constructs a transformer block to effectively segment the skin lesion, and constructs an edge decoder for each layer of the network to segment the skin lesion in detail. Experiment results have shown that the proposed method achieves a performance improvement of 0.041 ~ 0.071 for Dic Coefficient and 0.062 ~ 0.112 for Jaccard Index, compared with the previous method.

• Korean Chemical Engineering Research
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• v.46 no.1
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• pp.1-6
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• 2008

Block copolymers spontaneously assemble into various nanoscale structures such as spheres, cylinders, and lamellar structures according to the relative volumn ratio of each macromolecular block and their overall molecular weights. The self-assembled structures of block copolymer have been extensively investigated for the applications such as nanocomposites, photonic crystals, nanowires, magnetic-storage media, flash memory devices. However, the naturally formed nanostructures of block copolymers contain a high density of defects such that the practical applications for nanoscale devices have been limited. For the practical application of block copolymer nanostructures, a robust process to direct the assembly of block copolymers in thin film geometry is required to be established. To exploit self-assembly of block copolymer for the nanotechnology, it is indispensible to fabricate defect-free self-assembled nanostructure over an arbitrarily large area.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.41 no.10
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• pp.77-83
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• 2004

In low-power VLSI systems, it is effective to suppress leakage current by shutting down megablocks in idle states. Recently, multi-threshold voltage CMOS (MTCMOS) is widely accepted to shutdown power supply. However, it requires short wake-up time as operating frequency increases. This causes large current surge during wake-up process, and it often leads to system malfunction due to severe Power line noise. In this paper, a novel wake-up scheme is proposed to solve this problem. It exploits pipelined wake-up strategy in several stages that reduces maximum current on the power line and its corresponding power line noise. To evaluate its efficiency, the proposed scheme was applied to a multiplier block in the Compact Flash memory controller chip. Power line noise in shutdown and wake-up process was simulated and analyzed. From the simulation results, the proposed scheme was proven to greatly reduce the power line noise compared with conventional schemes.