• Nuclear Engineering and Technology
• /
• v.8 no.2
• /
• pp.81-88
• /
• 1976

A flash method for measuring the unknown thermal property (the density, specific heat, or thermal diffusivity could be chosen as unknown) is described. The thermal diffusivity of UO$_2$ fuel samples is obtained from room temperature (300 K) to high temperature (1400 K). The specific heat is measured using a commercially available differential scanning calorimeter from room temperature to 500 K. The thermal conductivity of UO$_2$ fuel samples is calculated from the density, thermal diffusivity, and specific heat at constant pressure. The present results are in complete agreement with the usual trends for the thermal conductivity of dielectric materials, in which impurity levels are very important at low temperatures but become relatively unimportant at high temperatures. In addition, the thermal diffusivity values at room temperature are reexamined by measuring the thermal diffusivity of several UO$_2$ fuel samples with same level of doped Gd$_2$O$_3$.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2010.08a
• /
• pp.181-181
• /
• 2010

현대 반도체 금속배선 연구에서는 기존에 쓰이던 Al (Aluminium) 금속배선 대신에 Cu (Copper) 금속배선 연구가 진행되고 있다. Cu는 Al 보다 비저항이 낮고, 녹는점도 Al보다 높다는 장점이 있지만 저온에서 기판인 Si (Silicon) 과 반응하고 접착력이 우수하지 못 하다는 단점이 있다. 이런 문제를 해결하기 위하여 확산방지막을 기판과 금속배선 사이에 삽입하는 방법이 제시 되었다. 확산방지막으로는 기존에 쓰이던 Ti (Titanium) 계열의 확산방지막과 W (Tungsten) 계열의 확산방지막이 있다. 이번 연구에서는 W 계열의 확산방지막에 불순물 C (Carbon) 과 N (Nitrogen) 을 첨가한 W-C-N 확산방지막 시편을 제조하였고, N2의 비율을 변화시키며 $600^{\circ}C$, $800^{\circ}C$열처리를 하였다. 본 실험의 결과로, 확산방지막의 $N_2$ 농도가 0, 0.5, 2 sccm으로 증가할수록 고온에서도 Elastic modulus 와 Hardness 값이 시편의 여러 영역에서 비교적 안정적으로 유지된다는 결과를 얻었다. 이 결과로부터 W-C-N 박막의 질소 농도에 따라 고온에서도 비교적 안정적으로 유지된다는 결과를 얻었다. 본 연구에서 시편은 RF magnetron sputtering 방법으로 제작하였고 Elastic modulus와 Hardness의 측정은 Hysitron사의 Triboindenter를 이용하였다. Indenting에 사용된 압입팁은 Berkovich tip을 사용하였다.

• Journal of the Korea Academia-Industrial cooperation Society
• /
• v.5 no.3
• /
• pp.210-217
• /
• 2004

This paper presents a simulation methodology for the poly-silicon oriented TCAD(technology-CAD) system. A computer simulation environment for the poly-silicon processing has been set up with the proper adoption of the two-stream model for ion-doping, diffusion, and defects inside of grain and on the grain boundary. After the simulator calibration, simulation results for the poly-silicon diffusion has showed a good agreement with the SIMS data.

• Journal of the Korean Vacuum Society
• /
• v.17 no.6
• /
• pp.518-522
• /
• 2008

The miniaturization of device size and multilevel interlayers have been developed by ULSI circuit devices. These submicron processes cause serious problems in conventional metallization due to the solubility of silicon and metal at the interface, such as an increasing contact resistance in the contact hole and interdiffusion between metal and silicon. Therefore it is necessary to implement a barrier layer between Si and metal. Thus, the size of multilevel interconnection of ULSI devices is critical metallization schemes, and it is necessary reduce the RC time delay for device speed performance. So it is tendency to study the Cu metallization for interconnect of semiconductor processes. However, at the submicron process the interaction between Si and Cu is so strong and detrimental to the electrical performance of Si even at temperatures below $200^{\circ}C$. Thus, we suggest the tungsten-carbon-nitrogen (W-C-N) thin film for Cu diffusion barrier characterized by nano scale indentation system. Nano-indentation system was proposed as an in-situ and nanometer-order local stress analysis technique.

• 전기의세계
• /
• v.27 no.6
• /
• pp.69-75
• /
• 1978

Diffusion processes of boron, phosphorus, and arsenic into silicon have been investigated using a new diffusion source called "spin-on source". Diffusion coefficients of these impurities have been calculated from the experimental results and are compared with the published values. Reasonable agreements have been found between the calculated and the published values. From this study, it is concluded that the spin-on source can be used as the diffusion source for integrated circuit fabricaticon.ricaticon.

• Korean Journal of Materials Research
• /
• v.2 no.5
• /
• pp.375-382
• /
• 1992

Molybdenum silicide films have been prepared by sputtering from a single composite MoS$i_2$ source on both P, B$F_2$respectively implanted (5${\times}10^{15}ions/cm^2$ single crystal and P implanted (5${\times}10^{15}ions/cm^2$) polycrystalline silicon substrates followed by rapid thermal annealing in the ambient of argon. The heat treatment temperatures have been varied in the range of 600-l20$0^{\circ}C$ for 20 seconds. The properties of Mo-silicide and the diffusion behaviors of dopant after the heat treatment are investigated using X-ray diffraction, scanning electron microscopy(SEM) , secondary ions mass spectrometry(SIMS), four-point probe and $\alpha-step.$ Annealing at 80$0^{\circ}C$ or higher resulted in conversion of the amorphous phase into predominantly MoS$i_2$and a lower sheet resistance. There was no significant out-diffusion of dopants from both single crystal and polycrystalline silicon substrate into molybdenum silicide layers during annealing.

• Journal of the Korean Institute of Telematics and Electronics
• /
• v.18 no.1
• /
• pp.51-56
• /
• 1981

A new I2L process for a high performance I2L structure is proposed. The modifiedstructure consists of a heavily doped extrinsic base and lowly doped intrinsic base where the collector regions are self-alignment with the intrinsic base regions. The proposed process untilizes spin-on sources as the diffusion sources and the self-alignment of collectors is achieved by using the hardened spin-on source as a diffusion mask. Test devices including a 13-stage ring oscillator have been fabricated by the proposed process on n/n+ silicon wafers with 6.5$\mu$m epitaxial layer. The maximum upward current gain of npn transistors is 8 for a three collector I2L cell. The speed-power product and minimum propagation delay for a one collector structure are 3.5 pJ and 50 ns, respectively.

• Journal of the Korean Institute of Telematics and Electronics
• /
• v.22 no.3
• /
• pp.95-102
• /
• 1985

An efficient numerical scheme for assessing the two-dimensional diffusion problem for modelling impurity profile in semiconductor is described. 4 unique combination of ADI (Al-ternating Direction Bmplicit) method and Gauss Elimination has resulted in a reduction of CPU time for most diffusion processes by a factor of 3, compared to other iteration schemes such as SOR (Successive Over-Relaxation) or Stone's iterative method without additional storage re-quirement. Various numerical schemes were compared for 2-D as well as 1-0 diffusion profile in terms of their CPU time while retaining the magnitude of relative error within 0.001%. good agree-ment between 1-D and 2-D simulation profile as well as between 1-D simulation profile and experiment has been obtained.

• Journal of the Korea Academia-Industrial cooperation Society
• /
• v.4 no.1
• /
• pp.17-21
• /
• 2003

It has been difficult to characterize the value of treated sapphires for gem stones with bare eyes. Color enhancing treatments by diffusion and annealing became sophisticated and customers and gemologists had asked a non-destructive and fast characterization method. We suggest that Fourier transformation infra-red (FTIR) offers to characterize the cobalt-doped synthetic sapphires successfully in 3 minutes. Our results imply that FTIR may be employed in jewelry business to identify the treated sapphires in quantitative way.

• Nuclear Engineering and Technology
• /
• v.7 no.2
• /
• pp.95-106
• /
• 1975

A comparative study has been carried out on three silicon solar cell samples through their current-voltage (I-V) characteristics and their efficiencies. One sample is an ion-implanted cell made by our laboratory, and the other two samples are the dopant-diffused cells made by a foreign maker. The experiments have shown that both the properties of junction formation and the efficiency of each sample depend highly on the I-V characteristic of each p-n junction. The cause of incomplete properties in the ion-implanted sample has been clarified through this comparative study to be due to the various reasons such as slightly deficient surface impurity concentrations, defects induced by both the radiation and the foreign impurities, and insufficient ohmic contacts at the electrodes. The conversion efficiency of the ion-implanted sample can be figured out to be 4.2% whereas those of the other samples to be 14.3% and 8.3%, respectively.