• Title/Summary/Keyword: 부호 반전

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Sign Reversal Channel Switching Method for Space-Frequency Block Code in Orthogonal Frequency Division Multiplexing System (직교 주파수 분할 다중화 시스템의 공간 주파수 블록 코딩에서의 부호 반전 채널 스위칭 기법)

  • Jung, Hyeok-Koo
    • Journal of Korea Society of Industrial Information Systems
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    • v.25 no.5
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    • pp.13-21
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    • 2020
  • This paper proposes a sign reversal channel switching method in space-frequency block code for orthogonal frequency division multiplexing system. In case of sending source data on other antenna, it is necessary for the receiver to change combining method according to the channel variation. If one does not know the predefined channel switching sequence, it is not possible to decode the received data precisely. In transmit data symbols' exchanges for a channel switching, data symbols are exchanged according to a format of space-frequency block code. In this paper, we proposes a simple sign reversal method except exchanging data symbols between transmit antennas. It is shown that this method occurs another combining method for a simple encryption in the receiver.

Random Sign Reversal Technique in Space Frequency Block Code for Single Carrier Modulation (단일 반송파 변조를 위한 공간 주파수 블록 코드의 난수 부호 반전 기법)

  • Jung, Hyeok-Koo
    • Journal of Korea Society of Industrial Information Systems
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    • v.27 no.5
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    • pp.25-36
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    • 2022
  • This paper proposes a random sign reversal technique in space frequency block code for single carrier modulation. The traditional space time and frequency block coding technique may be confronted with radio environments openly, severe radio hijacking problems are to be overcome. In order to avoid such an open radio issue, random coded data protection technique for space-time block code was proposed, but this algorithm can change channel combination per an Orthogonal Frequency Division Multiplexing block. This kind of slow switching increases the probability that nearby receivers will detect the transmitted data. This paper proposes a fast switching algorithm per data symbols' basis which is a random sign reversal technique in space frequency block code for Single Carrier Modulation. It is shown in simulation that the proposed one has a superior performance in comparison with the performance of the receiver which do not know the random timing sequence of sign reversal.

A Systematic Code Design for Reduction of the PAPR in OFDM (직교 주파수분할다중화에서 첨두전력 대 평균전력비 감소를 위한 체계적인 부호설계)

  • Kang Seog-Gen;Kim Jeong-Goo
    • Journal of Broadcast Engineering
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    • v.11 no.3 s.32
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    • pp.326-335
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    • 2006
  • Design criteria far a block code which guarantees minimized PAPR of the OFDM signals are proposed in this paper. Encoding procedure of the minimum PAPR codes (MPC) is composed of searching a seed codeword, circular shifting the register elements, and determining codeword inversion. It is shown that the PEP is invariant to the circular shift of register elements and codeword inversion. Based on such properties, systematic encoding rule for MPC is proposed. In addition proposed encoding rule can reduced greatly the size of look up table for MPC.

A Study on the Reversible SCR Servo Amplifier (정역전이 가능한 SCR 서보증폭기에 관한 연구)

  • Ahn, B. W.;Park, S. K.
    • Journal of the Korean Society of Fisheries and Ocean Technology
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    • v.31 no.2
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    • pp.190-198
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    • 1995
  • Many industrial servo amplifiers employ power transister as output device. Thyristor converters are not adopted to drive servo motor, although thyristor is superior to power TR in power rating, noise immunity, price, and size. The reason is, thyristor has no ability of self turn - off. Here in this paper line commutation, in which thyristor is turned off naturally since cathode voltage is higher than anode as time goes by, is employed to turn on thyristor with a delicate sequence. We developed thyristor servo amplifier which does not cause any damage on thyristor because it is designed to prevent triggering the two SCRs in the same arm simultaneously. And it was made clearly how to trigger SCR without any power line shorting and also harmonic analysis is carried out with the aid of FFT analyzer and proved that it can be used even severe reactive load. The designed circuit operated as a good DC amplifier in conventinal servomotor and the results can be use as a position control system application.

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High-Performance and Low-Complexity Decoding of High-Weight LDPC Codes (높은 무게 LDPC 부호의 저복잡도 고성능 복호 알고리즘)

  • Cho, Jun-Ho;Sung, Won-Yong
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.34 no.5C
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    • pp.498-504
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    • 2009
  • A high-performance low-complexity decoding algorithm for LDPC codes is proposed in this paper, which has the advantages of both bit-flipping (BF) algorithm and sum-product algorithm (SPA). The proposed soft bit-flipping algorithm requires only simple comparison and addition operations for computing the messages between bit and check nodes, and the amount of those operations is also small. By increasing the utilization ratio of the computed messages and by adopting nonuniform quantization, the signal-to-noise ratio (SNR) gap to the SPA is reduced to 0.4dB at the frame error rate of 10-4 with only 5-bit assignment for quantization. LDPC codes with high column or row weights, which are not suitable for the SPA decoding due to the complexity, can be practically implemented without much worsening the error performance.

Phase-Shift-Network-Based Differential Sequential Estimation for Code Acquisition in CDMA Systems (CDMA 시스템에서 부호 획득을 위한 위상 변이 네트워크 기반의 차동 순차 추정 기법)

  • Chong, Da-Hae;Lee, Byeong-Yun;Kim, Sang-Hun;Joung, Young-Bin;Song, Iick-Ho;Yoon, Seok-Ho
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.32 no.3A
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    • pp.281-289
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    • 2007
  • In this paper, a novel pseudo noise (PN) code acquisition scheme called the phase-shift-network-based differential sequential estimation (PDSE) is proposed, in the presence of data modulation in code division multiple access (CDMA) systems. The PDSE has even less complexity compared with that of the dual correlating sequential estimation (DCSE), and the reduction in complexity becomes more significant as the period of PN code increases. Numerical results demonstrate that the PDSE performs equivalently to the DCSE with less complexity.

Direct Methods

  • 서일환
    • Korean Journal of Crystallography
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    • v.12 no.1
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    • pp.37-54
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    • 2001
  • 1960년대까지는 단결정 구조를 해석할 때 주로 Patterson 방법으로 중원자(heavy atom)를 찾고 이 중원자에 의한 위상에 기초하여 구조를 해석해 왔다. 회절점의 위상을 수학적으로 결정하는 직접법(direct method)은 1948년 Harker와 Kasper에 의해서 최초의 논문이 발표된 이후, 50∼60년 대에 이론적 기초가 구축되었으며, 70년대부터 컴퓨터 프로그램화되어 실용되기 시작하였다. 본 해설문에서는 직접법에 사용되는 정규화된 구조 인자(normalized structure factor)와 unitary 구조 인자의 정의를 소개한 후, 직접법의 기본식인 Sayre 방정식으로부터 유도되는 반전적 혹은 대칭중심적(centric)인 경우에서 성립하는 부호 관계(sign relationship) 및 ∑₂-관계(∑₂-relation)와 비반전적(acentric)경우에서 성립하는 탄젠트 공식(tangent formula)의 유도 과정을 설명하였고, 부호 관계와 탄젠트 공식이 필요로 하는 처음 몇 개의 회절점의 위상을 정하는 과정도 보였다.

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A Study on the Performance Analysis of 4-ary Scaling Wavelet Shift Keying (4-ary 스케일링 웨이브릿 편이 변조 시스템의 성능 분석에 관한 연구)

  • Jeong, Tae-Il;Ryu, Tae-Kyung;Kim, Jong-Nam;Moon, Kwang-Seok;Kim, Hyun-Deok
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.14 no.5
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    • pp.1155-1163
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    • 2010
  • An algorithm of the conventional wavelet shift keying is carried out that the scaling function and wavelet are encoded to 1(mark) and 0(space) for the input binary data, respectively. Two bit modulation technique which uses four carrier frequencies is existed. Four carrier frequencies are defined as scaling function, inversed scaling function, wavelet, and inversed wavelet, which are encoded to 10, 11, 00 and 01, respectively. In this paper, we defined 4-ary SWSK (4-ary scaling wavelet shift keying) which is two bit modulation, and it is derived to the probability of bit error and symbol error of the defined system from QPSK. In order to analyze to the performance of 4-ary SWSK, we are obtained in terms of the probability of bit error and symbol error for QPSK (quadrature phase shift keying), MFSK(M-ary frequency shift keying) and proposed method. As a results of simulation, we confirmed that the proposed method was superior to the performance in terms of the probability of bit error and symbol error.

Dynamic Birefringence and Viscoelasticity of Polystyrene/Poly, (2,6-dimethyl-1-4-phenylen Oxide)Blends (Polystyrene/Poly(2,6-dimethyl-1,4-phenylene Oxide)블렌드의 동적 복굴절과 점탄성)

  • 황의정
    • The Korean Journal of Rheology
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    • v.9 no.3
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    • pp.89-96
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    • 1997
  • PS/PPO 블렌등의 동적 탄성율 E*($\omega$)와 동적 스트레인-광학계수 O*($\omega$)을 유리전이 영역에서 동시에 측정하여, PS/PPO 3종류조성블렌드의 E*($\omega$)와 O*($\omega$)완화거동을 조성 단 일 중합체와 비교고찰하였다. PS/PPO 블렌드의 $\alpha$-분산 점탄성 거동은 조성에 관계없이 거 의 유사하여 조성 고분자가 상호 협동적으로 완화하는 것을 알수 있었다. 그러나 광학적 완 화 스펙트럼 O*($\omega$)는 정성적으로 명확히 다른 거동을 보였다. 단일 PS와 PPO의 O*($\omega$)는 전 영역에 걸쳐 상반된 부로를 나타냈으며 두 고분자의 블렌드는 조성고분자의 반대부호를 상호보상으로 인하여 복굴절이 감소하였다. 3종류블렌드는 PPO의 조성이 증가함에 따라 상 호보상에 의해 O*($\omega$)의부호가 순차적으로 변하여 반전하였으며, 저 복굴절 PS/PPO 블렌드 의 PS조성이 65-80wt% 범위내에 있음을 추정할수 있었다. 상이한 부호를 갖는 복굴절 특 성으로 인하여 블렌드 내에서 각 성분 고분자의 완화 기여를 다순 가성법칙에 의해 정량적 으로 계산하는 것이 가능하였다. 또한 PS/PPO 블렌드의 상용성을 광학적 부분 기여 파라메 터를 사용하여 고찰하였다.

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A Modified Sum-Product Algorithm for Error Floor Reduction in LDPC Codes (저밀도 패리티 검사부호에서 오류마루 감소를 위한 수정 합-곱 알고리즘)

  • Yu, Seog-Kun;Kang, Seog-Geun;Joo, Eon-Kyeong
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.35 no.5C
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    • pp.423-431
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    • 2010
  • In this paper, a modified sum-product algorithm to correct bit errors captured within the trapping sets, which are produced in decoding of low-density parity-check (LDPC) codes, is proposed. Unlike the original sum-product algorithm, the proposed decoding method consists of two stages. Whether the main cause of decoding failure is the trapping sets or not is determined at the first stage. And the bit errors within the trapping sets are corrected at the second stage. In the modified algorithm, the set of failed check nodes and the transition patterns of hard-decision bits are exploited to search variable nodes in the trapping sets. After inverting information of the variable nodes, the sum-product algorithm is carried out to correct the bit errors. As a result of simulation, the proposed algorithm shows continuously improved error performance with increase in the signal-to-noise ratio. It is, therefore, considered that the modified sum-product algorithm significantly reduces or possibly eliminates the error floor in LDPC codes.