• Title/Summary/Keyword: 부분절연

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UHF Narrow Band Type Partial Discharge Diagnosis Method for the Internal Insulation Performance Verification of the Gas Insulated Switchgear (가스절연 개폐장치의 내부절연 성능검증을 위한 UHF 협대역 부분방전 진단법)

  • Song Won-Pyo;Kim Jung-Bae;Kim Min-So;Jung Jae-Ryong;Park Seung-Jae;Ko Heui-Suk
    • The Transactions of the Korean Institute of Electrical Engineers C
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    • v.54 no.9
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    • pp.414-420
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    • 2005
  • A method for partial discharge diagnosis based on UHF narrow band type for GIS has been developed and calibrated. In generally, PD cannot be directly measured under on-line condition, but we can indirectly measure the electromagnetic wave made by PD using the high-frequency antenna. Compared with VHF band, electromagnetic waves of UHF band have a low influence for external noise in high-voltage substation. Therefore, we can detect the real abnormality with several pC in GIS using UHF narrow-band type method. For the case of no internal VHF sensor for GIS of the domestic substation, it has applied to use the external UHF sensor attached in spacer in GIS of existing substation. In this paper, we firstly described the technique of partial discharge measurement using frequency analysis and phase analysis in UHF band. Secondly, we presented the results of sensitivity test, the relationship of dBm-pC and diagnosis result of the cause of PD source by phase analysis. And then, we report the diagnosis result of partial discharge on the real GIS in domestic substation. These results make above method applicable for measurement of quantity and cause of PD for real operation GIS in high-voltage substation.

Failure Analysis of LV URD Cable based on FMEA (FMEA에 근거한 LV URD 케이블의 고장분석)

  • Shong, Kil-Mok;Han, Woon-Ki;Kim, Young-Seok;Kim, Sun-Gu;Kwak, Hee-Ro
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.21 no.5
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    • pp.90-98
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    • 2007
  • The objective of this investigation was to reveal the cause of the faulted cable(LV URD(low voltage underground) cable). For the analysis, various types or equipments such as external pattern, thermal pattern, surface structure, thermal analysis, and property distribution were deployed. The international standards and the specification provided by the manufacturer of faulted cable were examined whether it fit the standards. The summary is as follows. (1) Discovered as a factor lowering insulation performance of the faulted cable: minimum thickness of the insulation layer specified by IEC 60502-1 and IEC 60811-1-1 was not fit. (2) Infrared absorption peaks measured by FT-IR spectrometer revealed that the measurements made for the same material did not conform and it is an important basis for proving heterogeneous composition of the insulation material. (3) It was found that PVC bedding was thermally fragile and therefore long term exposure at the site could cause similar fault pattern.

A Study on the Electric Field Analyses and Improvement of Insulation Characteristics on the Ribbed Spaced for GIS (GIS 립 스페이서에 대한 전계해석 및 절연특성 개선에 관한 연구)

  • 류성식;최영찬;곽희로
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.16 no.2
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    • pp.59-64
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    • 2002
  • This paper analyzed the effect of ribs on the breakdown characteristics when a metallic particle attaches on the various spot of GIS spacer, using electric field analysis. Also, it was compared with the experimental result of breakdown voltage characteristics for the spacer with a metallic particle on its various spot and with the shape, the length, and the thickness of the ribs varying. The results of electric field analysis show that the electric field concentration of the rib is more weakened than other parts and therefore it restrains the proceeding of streamer, which occurs at the breakdown. And it is verified through experiments that the breakdown voltage of the spacer with rib is higher than that of the spacer without rib. The breakdown characteristics depend on the shape, the length, and the thickness of the rib as well. Also, it is confirmed by the electric field analysis and the experimental results that the electric breakdown characteristics could be improved by rounding the rib edge.

In(1-x)Al(x)Sb Grading Buffer 기술을 사용한 InSb 박막의 최적화

  • Sin, Sang-Hun;Song, Jin-Dong;Kim, Tae-Geun
    • Proceedings of the Korean Vacuum Society Conference
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    • 2011.08a
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    • pp.308-308
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    • 2011
  • 6.48 ${\AA}$의 격자 상수를 갖는 InSb 물질은 0.17 eV의 낮은 에너지 밴드갭과 78,000 cm2/Vs의 전자 이동도를 갖는 물질로서 고속의 자성 센서소자, 장파장의 광 검출기 그리고 고속 전자소자 등의 분야에서 많은 주목을 받고 있다. 그러나, 전기적 특성이 우수한 InSb 물질을 소자로 구현하는데 있어서 큰 어려움이 있다. InSb와 격자 크기가 잘 맞으면서 절연이 우수한 기판의 부재가 가장 큰 문제가 되는 부분이다. 즉, 격자 부정합을 최소화하며 동시에 절연기판을 사용함으로써 소자의 특성을 잘 살려야 하는 것이다. 이러한 이유로 인하여 InSb 기반의 소자가 널리 사용되지 못하고 있는 것이다. 현재 범용으로 사용하고 있는 기판은 격자 부정합이 14%인 GaAs, 11%의 InP 그리고 18%의 Si 등이 있다. 이번 발표에서는 GaAs 기판 위에 격자 부정합을 최소화하여 InSb 박막을 최적화 시켜 성장하는 방법에 대해서 소개하고자 한다. InSb 박막 성장하는데 있어 논문으로 보고된 여러 가지 방법들이 있다. 기판과의 격자 부정합을 줄이기 위하여 저온-고온 (L-T)의 의한 메타몰픽(metamorphic) buffer 층을 성장 후 InSb 박막을 성장하는 방법[1] 그리고 단계별 buffer를 성장하는 방법[2] 등을 통해서 많은 진보가 있었다. 하지만, 우리는 GaAs 기판 위에 AlSb 박막을 성장 하면서 동시에 In과 Al의 양을 서서히 변화시키는 grading 기술을 사용하였다. 즉, 물질 각각의 격자상수를 고려하여 GaAs (기판)-AlSb-InAlSb-InSb로 변화를 주어 격자 부정합이 최소가 되도록 하여 만들어진 buffer 위에 InSb 층이 만들어 지도록 하여 GaAs 기판 위에 InSb 박막을 성장 할 수 있었다. grading 기술을 이용하여 만들어진 buffer 위에 성장된 0.3 um의 InSb 박막 층은 상온에서 전자 이동도가 약 38,000 cm2/Vs에 이르는 것을 확인하였다. InSb 박막의 두께가 약 1 um 되어야 30,000 cm2/Vs 이상의 전자 이동도를 얻을 수 있다고 많은 논문을 통해서 보고 되고 있으나 우리는 단지 0.3 um의 InSb 박막두께에서 이와 같은 전기적인 특성을 확인하였기에 이상과 같이 보고 하고자 한다.

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Characteristics of Thin-Film Inductors Using EeZrBAg Magnetic Thin Films (FeZrBAg 자성막을 이용한 박막 인덕터의 임피던스 특성)

  • 송재성;민복기;허정섭;김현식
    • Journal of the Korean Magnetics Society
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    • v.10 no.5
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    • pp.250-255
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    • 2000
  • Double rectangular spiral thin-film inductors were fabricated using $Fe_{86.7}Zr_{3.3}B_{4}Ag_{6}$ thin film with high permeability and resistance, in which easy axis of magnetization of the thin-film was perpendicular or parallel to the current direction. The perpendicular geometry inductor revealed higher inductance than the parallel geometry one, because spin aligns of magnetic film were more easily along the field direction due to higher field intensity in the perpendicular geometry. The increase of the inductance, however, resulted in the decrease of resonance frequency. The permeability was monitored by annealing the thin-films at different temperatures. With increasing the permeability, the inductance increased, but total resistance also increased due to the increase in magnetic core loss. As the resonance frequency was higher in air-core inductor than in magnetic thin-film core inductor, it is suggested to increase the resonance frequency that the characteristic of air-core inductor rather than the magnetic properties of the thin-film should be enhanced..

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고출력용 인쇄회로기판을 위한 무전해 니켈 도금막의 특성 연구

  • Yun, Jae-Sik;Jo, Yang-Rae;Kim, Hyeong-Cheol;Samuel, Tweneboah-Koduah;Lee, Yeon-Seung;Na, Sa-Gyun
    • Proceedings of the Korean Vacuum Society Conference
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    • 2013.02a
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    • pp.322-322
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    • 2013
  • 최근 전자제품들의 소형화, 경량화, 다기능화가 활발히 진행됨에 따라, 고성능의 고출력용 인쇄회로기판(PCB)의 개발이 요구되고 있다. PCB는 전자제품의 각 부품을 전기적으로 연결하는 통로로서 전자제품의 소형화, 다기능화에 따라 고집적화가 요구되고 있다. 하지만 모든 전자장비의 고장의 85% 정도가 발열에 의한 것으로, PCB의 고집적화에 따른 발열문제가 매우 중요한 이슈가 되고 있다. 최근에는 이러한 문제점을 해결하기 위해 PCB의 방열층으로 양극 산화막을 금속 기판 위에 형성하고 이 절연층 위에 금속층을 회로로서 형성하는 방열 PCB 기판에 대한 연구가 활발히 진행되고 있다. 최근까지, 금속층 회로 형성을 위해 무전해 Ni 도금에 대한 연구가 활발히 이루어져 왔다. 하지만 주로 화학적, 전기화학적 관점에서 많은 연구자들에 의해 조사 연구되어 왔다. 본 실험에서는 anodized Al 절연층 위의 회로전극 부분으로 스크린 방법으로 Ag paste를 패턴 인쇄한 뒤, 무전해도금 방식으로 저렴한 Ni 전면 회로전극을 형성하여 전기전도도를 높이고, 저항을 낮출 수 있는 회로로서 기판의 손상을 최소화하고 선택적으로 Ag 패턴에만 Ni 전극회로를 형성시키는 것을 목표로 연구하였다. Ni-B 무전해 도금시 도금조의 온도는 $65^{\circ}C$, 무전해 도금액의 pH는 ~7 (중성)로 유지하였다. Al2O3 기판을 이용한 Ag Paste 패턴 위에 증착된 Ni-B 박막의 특성을 분석하기 위해 X-ray diffraction (XRD), AFM (Atomic Force Microscopy), SEM (Scanning Electron Microscope), XPS (X-ray Photoelectron Spectroscopy)을 이용하여 Ni-B 박막의 특성을 분석하였다.

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Analysis of Sound Signal by Conducting Particle in Coaxial Cylindrical Electrodes (동축원통 전극내의 파티클에 의한 음향신호 분석)

  • 조국희;권동진;곽희로
    • The Proceedings of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.11 no.6
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    • pp.104-110
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    • 1997
  • In thes paper, the soung signals due to the collisions against the inside wall by conductint particles with in coaxial cylindrical electrodes, and the corresponding frequency spectrum are analyzed and discribed.Thesesound signals were detected and measured using ultrasonic and vibration sensors attached to the exterior of the GIS enclosure. In the case where a particls is bouncing about between these coaxoal electrodes, the sound signal was found to be more than 10[dB] greater than the background noise due to no particlel. Also, in the case where a particle collides and insulation breakdown caesed by the particle made it possible to determine the condition of the insulation inside the sealed GIS. Lastly, the relationship between the peak amplitude and RMS voltage of the measured signal, the diameter and length of the particle was analyzed. Using thes analysis, it is possible to confirm the size of particle.

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Thickness Control of Electroplating Layer for Copper Pillar Tin Bump (구리기둥범프 용 전해도금 층 제어)

  • Moon, Dae-Ho;Hong, Sang-Jeen;Park, Jong-Dae;Hwang, Jae-Ryong;Soh, Dea-Wha
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2011.10a
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    • pp.903-906
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    • 2011
  • The electroplating and electro-less plating methods have been applied for the high density chip interconnect of the Copper Pillar Tin Bump (CPTB) preparation. The CPTB was prepared, which had been electroplated about $100{\mu}m$ pitch of copper layer firstly, and then the Tin layer was deposited on the copper pillar surface to protect the oxidation of it. It was also very important to get uniform thickness of electroplated copper layer, though it was difficult and sensitive. In order to control the thickness distribution, it was examined that the current separating disk of Insulating Gate with a hole in the center was installed between electrodes. The current flows through the center hole of the Insulating Gate in the cylindrical electroplating bath and the other parts were blocked to protect current flowing. The main current flowed through the center hole of the Insulating Gate directly to the opposite electrode of wafer disk. As the results, it was verified that the copper layer was thick in the center part of wafer disk with distribution of thinner to the outer part toward edge.

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Partial Discharge Phenomena with $SF_{6}$ Gas Pressures in Insulation Consisted of Insulation Paper and $SF_{6}$ Gas(II) ($SF_{6}$가스와 절연지의 절연계에서 가스압력에 따른 부분방전 현상(II))

  • Seon, Jong-Ho;Kim, Gwang-Hwa;Park, Jeong-Hu;Jo, Jeong-Su
    • The Transactions of the Korean Institute of Electrical Engineers C
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    • v.51 no.9
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    • pp.430-435
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    • 2002
  • The $SF_{6}$ gas insulated power equipments have the insulation systems which are composed of $SF_{6}$ gas and insulation paper. It is repored that their insulation abilities are influenced by the $SF_{6}$ gas gaps in those insulation systems and gas pressures. This paper describes partial discharge phenomena with $SF_{6}$ gas pressures in insulation system of $SF_{6}$ gas-insulation paper Specimens of $SF_{6}$ gas-insulation paper were prepared and aramid paper was used as insulation paper. Partial discharge inception voltages(PDIV) and breakdown voltages for the existence of $SF_{6}$ gas gaps were measured by short term tests with gas pressures. Also, average PD quantities and pulse counts, life times of each specimens were calculated from the results of long term aging tests with gas pressures. It was found that the $SF_{6}$ gas gaps decrease increasing rates of PDIV and brealdown voltages according to gas pressure increase and the insulation breakdown caused by the smaller PD quantities than 1[pC] at the high gas pressure of 300kPa is due to the increase of energy density with increase of gas pressure.

Study on Design of ZnO-Based Thin-Film Transistors With Optimal Mechanical Stability (ZnO 기반 박막트랜지스터의 기계적 안정성 확보에 관한 연구)

  • Lee, Deok-Kyu;Park, Kyung-Yea;Ahn, Jong-Hyun;Lee, Nae-Eung;Kim, Youn-Jea
    • Transactions of the Korean Society of Mechanical Engineers B
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    • v.35 no.1
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    • pp.17-22
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    • 2011
  • ZnO-based thin-film transistors (TFTs) have been fabricated and the mechanical characteristics of electric circuits, such as stress, strain, and deformation are analyzed by the finite element method (FEM). In this study, a mechanical-stability design guide for such systems is proposed; this design takes into account the stress and deformation of the bridge to estimate the stress distribution in an $SiO_2$ film with 0 to 5% stretched on 0.5-${\mu}m$-thick. The predicted buckle amplitude of $SiO_2$ bridges agrees well with experimental results within 0.5% error. The stress and strain at the contact point between bridges and a pad were measured in a previous structural analysis. These structural analysis suggest that the numerical measurement of deformation, SU-8 coating thickness for Neutral Mechanical Plane (NMP) and ITO electrode size on a dielectric layer was useful in enhancing the structural and electrical stabilities.