• The Journal of The Korea Institute of Intelligent Transport Systems
• /
• v.9 no.6
• /
• pp.105-112
• /
• 2010

Recently, wireless communication systems have been developed and the circuits which operate with the broad-band for multiband uses were introduced. However, broad-band circuits have problems that inevitably increase the size. Dual-band circuit operates only two frequency, therefore, it will be able to miniaturize through unnecessary decreased elements. The Wilkinson power divider is the one of the most commonly used components in wireless communication system for power division. Nowaday, the Wilkinson power divider is also demanded dual-band. In this paper, I propose miniaturized dual-band Wilkinson power divider operating at 2.45 GHz and 5.2 GHz for IEEE 802.11n standard. Proposed dual-band Wilkinson power divider is used in parallel stub line. The design is accomplished by transforming the electrical length and impedance of the quarter wave sections of the conventional Wilkinson power divider into dual band ${\pi}$-shaped sections.

• Journal of the Institute of Electronics and Information Engineers
• /
• v.52 no.3
• /
• pp.75-81
• /
• 2015

This paper proposed the new eight-parallel MDC FFT processor using the eight-parallel MDC architecture and the efficient scheduling scheme. The proposed FFT processor supports the 256-point FFT based on the modified radix-$2^6$ FFT algorithm. The proposed scheduling scheme can reduce the number of complex multipliers from eight to six without increasing delay buffers and computation cycles. Moreover, the proposed FFT processor can be used in OFDM systems required high throughput and low hardware complexity. The proposed FFT processor has been designed and implemented with a 90nm CMOS technology. The experimental result shows that the area of the proposed FFT processor is $0.27mm^2$. Furthermore, the proposed eight-parallel MDC FFT processor can achieve the throughput rate up to 2.7 GSample/s at 388MHz.

• The Journal of the Korea Contents Association
• /
• v.16 no.7
• /
• pp.667-680
• /
• 2016

As distributed computing platforms like Hadoop MapReduce have been developed, it is necessary to perform the conventional query processing techniques, which have been executed in a single computing machine, in distributed computing environments efficiently. Especially, studies on similarity join query processing in distributed computing environments have been done where similarity join means retrieving all data pairs with high similarity between given two data sets. But the existing similarity join query processing schemes for distributed computing environments have a problem of skewed computing load balance between clusters because they consider only the data transmission cost. In this paper, we propose Matrix-based Load-balancing Algorithm for efficient similarity join query processing in distributed computing environment. In order to uniform load balancing of clusters, the proposed algorithm estimates expected computing cost by using matrix and generates partitions based on the estimated cost. In addition, it can reduce computing loads by filtering out data which are not used in query processing in clusters. Finally, it is shown from our performance evaluation that the proposed algorithm is better on query processing performance than the existing one.

• Journal of Broadcast Engineering
• /
• v.25 no.5
• /
• pp.655-664
• /
• 2020

Free viewpoint image synthesis technology is one of the important technologies in the MPEG-I (Immersive) standard. RVS (Reference View Synthesizer) developed by MPEG-I and in use in MPEG group is a DIBR (Depth Information-Based Rendering) program that generates an image at a virtual (intermediate) viewpoint from multiple viewpoints' inputs. RVS uses the mesh surface method based on computer graphics, and outperforms the pixel-based ones by 2.5dB or more compared to the previous pixel method. Even though its OpenGL version provides 10 times speed up over the non OpenGL based one, it still shows a non-real-time processing speed, i.e., 0.75 fps on the two 2k resolution input images. In this paper, we analyze the internal of RVS implementation and modify its structure, achieving 34 times speed up, therefore, real-time performance (22-26 fps), through the 3 key improvements: 1) the reuse of OpenGL buffers and texture objects 2) the parallelization of file I/O and OpenGL execution 3) the parallelization of GPU shader program and buffer transfer.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.36 no.3C
• /
• pp.175-182
• /
• 2011

This paper presents a novel eight-parallel 128/256-point mixed-radix multi-path delay commutator (MRMDC) FFT/IFFT processor for orthogonal frequency-division multiplexing (OFDM) systems. The proposed FFT architecture can provide a high throughput rate and low hardware complexity by using an eight-parallel data-path scheme, a modified mixed-radix multi-path delay commutator structure and an efficient scheduling scheme of complex multiplications. The efficient scheduling scheme can reduce the number of complex multipliers at the second stage from 88 to 40. The proposed FFT/IFFT processor has been designed and implemented with the 90nm CMOS technology. The proposed eight-parallel FFT/IFFT processor can provide a throughput rate of up to 27.5Gsample/s at 430MHz.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.15 no.1
• /
• pp.99-106
• /
• 2011

The emerging of ubiquitous computing and healthcare technologies provides us a strong platform to build sustainable healthcare applications especially those that require real-time information related to personal healthcare regardless of place. We realize that system stability, reliability and data protection are also important requirements for u-healthcare services. Therefore, in this paper, we designed a u-healthcare system which can be attached to the patient's body to measure vital signals, enhanced with USN secure sensor module. Our proposed u-healthcare system is using wireless sensor modules embedded with NLM-128 algorithm. In addition, PS-LFSR technique is applied to the NLM-128 algorithm to enable faster and more efficient computation. We included some performance statistical results in term of CPU cycles spent on NLM-128 algorithm with and without the PS-LFSR optimization for performance evaluation.

• Journal of Broadcast Engineering
• /
• v.18 no.6
• /
• pp.816-822
• /
• 2013

The latest video coding standard HEVC was developed by the joint work of JCT-VC(Joint Collaborative Team on Video Coding) from ITU-T VCEG and ISO/IEC MPEG. The HEVC standard reduces the BD-Bitrate of about 50% compared with the H.264/AVC standard. However, using the various methods for obtaining the coding gains has increased complexity problems. The proposed method reduces the complexity of HEVC by using both CPU parallel processing and GPU-accelerated processing. The experiment result for UHD($3840{\times}2144$) video sequences achieves 15fps encoding/decoding performance by applying the proposed method. Sooner or later, we expect that the H/W speedup of data transfer rates between CPU and GPU will result in reducing the encoding/decoding times much more.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2011.08a
• /
• pp.340-340
• /
• 2011

플라즈마 공정에서의 생산률이 플라즈마의 밀도에 비례한다는 많은 연구가 이루어진 후, 초대면적 고밀도 플라즈마 소스의 개발은 플라즈마 소스 개발에서 중요한 부분을 차지하기 시작하였다. 이로 인해, 전자 공명 플라즈마, 유도 결합 플라즈마와 헬리콘 플라즈마 등 새로운 고밀도 플라즈마 개발 연구가 활발히 진행되고 있다. 최근에는 고밀도 플라즈마 개발과 더불어, 대면적 플라즈마 소스의 개발이 플라즈마 공정 기술의 중요한 이슈가 되고 있는데, 이는 450 mm 이상의 반도체, 2 m${\times}$2 m 이상의 8세대 평판 디스플레이와 1 m${\times}$1 m 태양광 전지 생산 공정에서 플라즈마의 기술이 요구되고 있기 때문이다. 대면적 공정영역의 이러한 경향은 균일한 대면적 고밀도 플라즈마 개발을 촉진시켜왔다. 밀도가 낮은 축전 결합 플라즈마를 제외한, 대면적 공정에 적합한 고밀도 플라즈마원으로 유도 결합 플라즈마와 헬리콘 플라즈마를 선택한 후, 병렬연결 시의 특성을 알기 위하여 ICP와 헬리콘의 단일 튜브와 다수 튜브의 플라즈마 내부, 외부 변수를 측정하여 조사하였다. 두 가지 플라즈마 소스의 비교 실험을 위하여, 자기장을 제외한 모든 조건을 동등하게 한 후 실험을 하였다. 단일 헬리콘 실험을 바탕으로, 대면적 실험에 가장 적합한 자기장의 세기, 자석의 위치 및 튜브의 치수를 정한 후, fractal 구조를 위한 16개 다수 방전을 ICP와 헬리콘을 비교하였다. 병렬연결 시, RF 플라즈마에서는 같은 전압을 가져도, 안테나 디자인을 고려하지 않으면 모든 튜브의 방전이 이루어 지지 않았다. 이를 컴퓨터 모의 전사를 통해 확인하고, 가장 최적화된 안테나를 설계하여 실험을 하였다. ICP에서는 모든 튜브가 방전에 성공한 반면, 헬리콘 플라즈마는 ICP에 10배에 달하는 높은 밀도를 냈으나, 오직 4개 튜브만이 켜지고 안정적으로 방전이 이루어 지지 않았다. ICP의 경우, RF 전송선의 디자인을 통해 파워의 균등 분배가 가능하지만, 헬리콘의 경우 자기장을 추가해서 고려해야 되는 것을 확인하였다. 모든 튜브에 비슷한 자기장을 형성하기 위해서는 자석의 크기가 커지는 문제점이 있으나, 매우 낮은 압력에서 방전이 가능하고, 같은 압력에서 ICP에 비해 10배 이상 달하는 장점이 있다. 실험 결과를 바탕으로, ICP와 헬리콘 플라즈마의 다수 방전에 대한 분류를 하였고, 바로 현장에 투입이 가능한 소스로 판단된다.

• Journal of KIISE:Computer Systems and Theory
• /
• v.29 no.10
• /
• pp.550-560
• /
• 2002

External sort on cluster computers requires not only fast internal sorting computation but also careful scheduling of disk input and output and interprocessor communication through networks. This is because the overall time for the execution is determined by reflecting the times for all the jobs involved, and the portion for interprocessor communication and disk I/O operations is significant. In this paper, we improve the sorting performance (sorting throughput) on a cluster of PCs with a low-speed network by developing a new algorithm that enables even distribution of load among processors, and optimizes the disk read and write operations with other computation/communication activities during the sort. Experimental results support the effectiveness of the algorithm. We observe the algorithm reduces the sort time by 45% compared to the previous NOW-sort[1], and provides more scalability in the expansion of the computing nodes of the cluster as well.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.22 no.12
• /
• pp.2653-2663
• /
• 1997

The successive and parallel interference cancellation schemes are two well-known types of multi-stage interference cancellation schemes using the conventional correlator receivers as a basic building block, which has been known to significantly improve the performance of DS/CDMA system in the multiple access communication. Performance comparison between these two schemes is made strictly based on the analytical and it has been shown that the successive interference cancellation (SIC) scheme is more resistant to fading than the parallel interference cancellation (PIC) scheme. We further investigate the performance of the successive IC scheme subject to the delay constraint, which may be imposed typically on most of service applications with a real-time transmission requirement, including speech and video applications. Our analysis demonstrates that the performance may be significantly improved by the groupwise successive interference cancellation (GSIC) scheme, which can be properly optimized to meet the given delay constraint.