• Journal of the Korea Institute of Information Security & Cryptology
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• v.32 no.6
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• pp.1127-1137
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• 2022

Cryptographic analysis and decryption technology utilizing the parallel operation of GPU has been studied in the direction of shortening the computation time of the password analysis system. These studies focus on optimizing the code to improve the speed of cryptographic analysis operations on a single GPU or simply increasing the number of GPUs to enhance parallel operations. However, using a large number of GPUs without optimization for data transmission causes longer data transmission latency than using a single GPU and increases the overall computation time of the cryptographic analysis system. In this paper, we investigate GPUDirect RDMA and related technologies for high-performance data processing in deep learning or HPC research fields in GPU clustering environments. In addition, we present a method of designing a high-performance cryptanalysis system using the relevant technologies. Furthermore, based on the suggested system topology, we present a method of implementing a cryptanalysis system using password cracking and GPU reduction. Finally, the performance evaluation results are presented according to demonstration of high-performance technology is applied to the implemented cryptanalysis system, and the expected effects of the proposed system design are shown.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.20 no.4
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• pp.381-389
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• 2009

Orthogonal frequency division multiplexing(OFDM) that is very useful for the high-speed communication system has serious problem of high peak-to-average power ratio(PAPR) in time domain. Because of this, the non-linear distortion can be produced and system performance gets worse. CI-OFDM system can get the peak power lowered. In this CI-OFDM system, each parallel data is distributed into N all sub-carriers and conveyed by the orthogonal phase factor. Also, CI-OFDM shows frequency diversity effect. Therefore, CI-OFDM system is better than ordinary OFDM system in terms of BER performance and the PAPR reduction. When it is implemented, however, there is a serious problem whether it can separate and compensate the phase factor in order in the receiver. Because all bits are transmitted simultaneously over all subcarriers and each other phase factors in transmitter. In this paper, we propose and evaluate a FD-CI-OFDM system that is a version of improved CI-OFDM. This is designed by use of the Walsh Hadamard sequence. The FD-CI-OFDM shows better performance than ordinary OFDM and CI-OFDM system.

• Proceedings of the Korean Society for Agricultural Machinery Conference
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• 2017.04a
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• pp.169-169
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• 2017

스마트 돈사 내의 열환경 분석에 필수적으로 고려되어야 인자는 가축의 복사 에너지 변화로 볼 수 있다. 열환경 제어의 대상이기도 하지만 회귀적으로 열환경 변화의 인자이기도 하다. 이러한 가축의 복사 에너지 분석을 위하여 시설 내에 용이하게 배포가 가능한 열화상 계측 시스템을 개발하였다. 초소형 마이크로 열화상 계측 시스템에 부가적으로 IOT(Internet of Thing) 기반 기술을 이용한 모듈화 개발을 병행하였다. 열화상 계측 센서로 LWIR(Longwave infrared)영역에 해당하는 $8{\mu}m{\sim}4{\mu}m$의 영역에서 $0.05^{\circ}C$의 분해능을 보이는 $Lepton^{TM}$ (500-0690-00, FLIR, Goleta, CA)모델을 사용하였다. SPI(Serial Peripheral Interface) 속도 2 Mhz로 마이크로프로세서(NanoPi NEO Air, FrendlyArm, CA, USA)와 고속 통신을 수행하여 9 Hz의 계측이 가능하다. 열화상 센서와 마이컴으로 구성되는 단위 계측 시스템의 통신 기능 확장을 위하여 다음과 같이 세 단계의 정보 전달 시나리오를 설계하였다. 1) 단독적으로 열화상을 계측 하고 내장된 메모리에 저장하는 형식 2) 인접한 사용자 인터페이스에서 1번 단독 모듈에 접속하여 열화상을 실시간으로 전송하여 화면에 도시하는 형식 3) 2번 사용자 도시모듈과 병행적으로 Local WI-FI 통신을 이용한 모바일 기기에 화면을 도시하는 형식. 이와 같은 계층적이며 모듈화된 계측 시스템을 구성하기 위해서 1번 모듈에 공개 소프트웨어인 Hostapd 2.5(http://w1.fi/hostapd)버전을 설치하였다. 외부 인터넷 환경이 없는 상황에 1번 모듈 단독으로 AP(Access Point) 기능을 제공하여 지근 거리에 있는 2번 모듈과 3번 모바일 기기의 접속을 관리할 수 있다. 2번 모듈의 경우 화면 다수의 1번 모듈에 접속을 교차적으로 수행하는 방식과 2번 모듈 자체가 AP가 되어 1번 모듈의 접속을 허용하는 형태로 구성되어 있다. 계측 시스템의 계측 매트릭스 구성에 따라 선택적으로 결정할 수 있다. 1번 2번 모듈 공통적으로 TCP/IP Listener와 Client 서비스를 병렬적으로 수행할 수 있도록 개발을 하였다. 3번 모바일 기기에서 사용자 인터페이스 구현을 위하여 범용 Android 기반 GUI 프로그램과 Socket 통신을 연동시켰다. 1개의 열화상 Frame의 전송량은 9,600 Byte ($=80{\times}60{\times}2Byte$) 로 WI-FI 통신 전송 시 2회 ~ 6회 정도 내외로 가변적인 통신 수행 횟수를 나타내었다. 센서 계측 시스템과 정보 전송 시스템을 병렬적으로 구성한 모듈화 된 계측시스템의 전 요소에서 센서에서 제공하는 최대 계측 주기인 9 Hz 구현이 일반적으로 가능하였다. 이를 이용한 추후 연구를 통해 가축 객체의 열복사 정보와 돈사 내 열환경 간의 역학성을 연구할 것이다.

• Journal of Broadcast Engineering
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• v.18 no.2
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• pp.204-214
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• 2013

Recently various research have been conducted relating to the implementation of signal processing or communication system by software using the massively parallel processing capability of the GPU. In this work, we focus on reducing software simulation time of 2K/8K FFT in DVB-T by using GPU. we estimate the processing time of the DVB-T system, which is one of the standards for DTV transmission, by CPU. Then we implement the FFT processing by the software using the NVIDIA's massively parallel GPU processor. In this paper we apply stream process method to reduce the overhead for data transfer between CPU and GPU, coalescing method to reduce the global memory access time and data structure design method to maximize the shared memory usage. The results show that our proposed method is approximately 20~30 times as fast as the CPU based FFT processor, and approximately 1.8 times as fast as the CUFFT library (version 2.1) which is provided by the NVIDIA when applied to the DVB-T 2K/8K mode FFT.

• The Journal of The Korea Institute of Intelligent Transport Systems
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• v.15 no.3
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• pp.146-154
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• 2016

Visible light communication using LED is a technique for transmitting digital data using the light of the LED. Recently, high-speed data rate plays an important role. Therefore, many scholars have researched the MIMO-VLC which is able to increase data rate using a lot of LED transmitters. However, it has problems such as light interference and flicker when transmitting different bit. Many researcher have focused on reduce interference. However it is not considered about flicker problem. Flicker is defined unstable brightness. It occurred the tired of human eyes, lowers eyesight and also decreases concentration. In order to solve this flicker problem in MIMO-VLC, we propose the PFM(Parallel Flicker Mitigation) code. PFM code using combinatorial theory can maintain constant brightness the whole bit duration. Therefore, it is possible to assure the brightness by confirm simulation results.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.26 no.12C
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• pp.240-248
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• 2001

This paper describes the design of a space-division switch which can support a self-healing operation of 2-fiber bidirectional line switched ring in 2.5Gb/s SDH-based transmission system. The switch having a 1.25Gb/s throughput has been designed and implemented with COMPASS tool and 0.87$\mu\textrm{m}$ CMOS gate-array. The proposed switch is suitable for the quickly self-healing operations when a failure occurs in a 2-fiber bidirectional switched ring composed of ADM transmission systems. The switch is composed of an add/drop control part, a cross-point switch, a frame-phase aligner, processor interface and an unequipped data framer. The test results of the switch adapted to 2.SGb/s SDH-based transmission system, show immediate restoration when a failure occurs.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.49 no.3
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• pp.47-61
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• 2012

parallel transmitting system with channel bonding method have been proposed to transmit mass content such as UHD(Ultra High Definition) in HFC(Hybrid Fiber Coaxial) networks. However, this system may lead to channel resource problem because the system needs many channels to transmit mass content. In this paper, we analyze three effective bandwidth approximation algorithms to use the bonding channel efficiently. These algorithms are the effective bandwidth of Gaussian approximation method algorithm proposed by Guerin, the effective bandwidth based on statistics of video frames proposed by Lee and the effective bandwidth based on Gaussian traffic proposed by Nagarajan. We also evaluate compatibility of algorithms to the mass broadcasting service. OPNET simulator is used to evaluate the performance of the algorithms. For accuracy of simulation, we make mass source from real HD broadcasting stream.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.25 no.12
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• pp.1859-1867
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• 2021

Multi LiDAR sensors are being mounted on autonomous vehicles, and a system to multi LiDAR sensors data is required. When sensors data is transmitted or processed to the main processor, a huge amount of data causes a load on the transport network or data processing. In order to minimize the number of load overhead into LiDAR sensor processors, only semantic data is transmitted through data comparison between frames in LiDAR data. When data from 4 LiDAR sensors are processed in a static environment without moving objects and a dynamic environment in which a person moves within sensor's field of view, in a static experiment environment, the transmitted data reduced by 89.5% from 232,104 to 26,110 bytes. In dynamic environment, it was possible to reduce the transmitted data by 88.1% to 29,179 bytes.

• Journal of Korean Society of Coastal and Ocean Engineers
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• v.9 no.4
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• pp.176-181
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• 1997

A practical, easy-to-use data acquisition device has been developed for use in civil and envirionmental engineering applications. It uses the PC parallel port for the acquisition and data transfer and is simple enough to be setup and run in laboratory and field experiment conditions. The usual limitations of data storage capacity of several data loggers was solved by using PC resources. Also versatile programming capability using high level languages of the PC programming environment such as C and Visual Basic enables the data acquisition device to be configured as a general and practical data acquisition system. An example of effective uses of the device is. provided for the water environment measurement at the Bangwha bridge construction site. The in site. test proved the device to be practical in civil and environmental engineering applications.

• The KIPS Transactions:PartA
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• v.15A no.3
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• pp.135-140
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• 2008

This paper describes a high-speed CMOS demultiplexer using redundant multi-valued logic (RMVL). The proposed circuit receives serial binary data and is converted to parallel redundant multi-valued data using RMVL. The converted data are reconverted to parallel binary data. By the redundant multi-valued data conversion, the RMVL makes it possible to achieve higher operating speeds than that of a conventional binary logic. The implemented demultiplexer consists of eight integrators. Each integrator is composed of an accumulator, a window comparator, a decoder and a D flip flop. The demultiplexer is designed with TSMC $0.18{\mu}m$ standard CMOS process. The validity and effectiveness are verified through the HSPICE simulation. The demultiplexer is achieved the maximum data rate of 20 Gb/s and the average power consumption of 95.85 mW.