• The Journal of the Korea Contents Association
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• v.15 no.7
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• pp.1-11
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• 2015

In recent high performance computing system, GPGPU has been widely used to process general-purpose applications as well as graphics applications, since GPU can provide optimized computational resources for massive parallel processing. Unfortunately, GPGPU doesn't exploit computational resources on GPU in executing general-purpose applications fully, because the applications cannot be optimized to GPU architecture. Therefore, we provide GPU research guideline to improve the performance of computing systems using GPGPU. To accomplish this, we analyze the negative factors on GPU performance. In this paper, in order to clearly classify the cause of the negative factors on GPU performance, GPU core status are defined into 5 status: fully active status, partial active status, idle status, memory stall status and GPU core stall status. All status except fully active status cause performance degradation. We evaluate the ratio of each GPU core status depending on the characteristics of benchmarks to find specific reasons which degrade the performance of GPU. According to our simulation results, partial active status, idle status, memory stall status and GPU core stall status are induced by computational resource underutilization problem, low parallelism, high memory requests, and structural hazard, respectively.

• The Journal of the Korea Contents Association
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• v.13 no.3
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• pp.9-21
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• 2013

Due to increased computing power and flexibility of GPU, recent GPUs execute general purpose parallel applications as well as graphics applications. Programmers can use GPGPU by using the APIs from GPU vendors. Unfortunately, computational resources of GPU are not fully utilized when executing general purpose applications because of frequent branch instructions. To handle the branch problem, several warp formations have been proposed. Intuitively, we expect that the warp formations providing higher computational resource utilization show higher performance. Contrary to our expectations, according to simulation results, the performance of the warp formation providing better utilization is lower than that of the warp formation providing worse utilization. This is because warp formation providing high utilization causes serious memory bottleneck due to increased memory request. Therefore, warp formation providing high computation utilization cannot guarantee high performance without proper hardware resources. For this reason, we will analyze the correlation between hardware configuration and warp formation. Our simulation results present the guideline to solve the underutilization problem due to branch instructions when designing recent GPU.

• Smart Media Journal
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• v.3 no.1
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• pp.33-38
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• 2014

Even though the performance of microprocessor is improved continuously, the performance improvement of computing system becomes hard to increase, in order to some drawbacks including increased power consumption. To solve the problem, general-purpose computing on graphics processing units(GPGPUs), which execute general-purpose applications by using specialized parallel-processing device representing graphics processing units(GPUs), have been focused. However, the characteristics of applications related with graphics is substantially different from the characteristics of general-purpose applications. Therefore, GPUs cannot exploit the outstanding computational resources sufficiently due to various constraints, when they execute general-purpose applications. When designing GPUs for GPGPU, memory system is important to effectively exploit the GPUs since typically general-purpose applications requires more memory accesses than graphics applications. Especially, external memory access requiring long latency impose a big overhead on the performance of GPUs. Therefore, the GPU performance must be improved if hierarchical memory architecture which can reduce the number of external memory access is applied. For this reason, we will investigate the analysis of GPU performance according to hierarchical cache architectures in executing various benchmarks.

• Journal of KIISE:Databases
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• v.37 no.5
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• pp.275-284
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• 2010

GPUs are stream processors based on multi-cores, which can process large data with a high speed and a large memory bandwidth. Furthermore, GPUs are less expensive than multi-core CPUs. Recently, usage of GPUs in general purpose computing has been wide spread. The CUDA architecture from Nvidia is one of efforts to help developers use GPUs in their application domains. In this paper, we propose techniques to parallelize a skyline algorithm which uses a simple nested loop structure. In order to employ the CUDA programming model, we apply our optimization techniques to make our skyline algorithm fit into the performance restrictions of the CUDA architecture. According to our experimental results, we improve the original skyline algorithm by 80% with our optimization techniques.

• Proceedings of the Korean Information Science Society Conference
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• 2012.06a
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• pp.409-410
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• 2012

범용 계산에 GPU를 활용하는 GPGPU 연구가 활발히 이루어지고 있다. 기존 연구에서 사용된 병렬화 기법은 데이터 이동시 GPU의 유휴자원을 잘 활용하지 못한다. 우리는 스트림 기법을 이용하여 CPU-GPU간 데이터 이동과 GPU내 연산을 동시에 실행시켜 데이터 이동시 GPU의 유휴자원을 최대한 활용하여 성능을 향상한다. 제안된 방식은 기존의 병렬화 방법에 비해 약 1.1배 향상된 성능을 나타낸다.

• Proceedings of the Korea Society for Industrial Systems Conference
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• 2009.05a
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• pp.196-199
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• 2009

높아지는 Graphic Processing Unit (GPU)의 연산 성능과 GPU에서의 범용 프로그래밍을 위한 개발 환경의 개발, 보급으로 인해 GPU를 일반연산에 활용하는 연구가 활발히 진행되고 있다. 이와같이 일반 연산에 활용되고 있는 GPU로 nVidia Tesla와 AMD/ATI의 FireStream 들이 있다. 특수목적 연산 장치인 GPU를 일반 연산을 위해 프로그래밍하기 위해서는 그에 맞는 프로그램 개발 환경이 필요한데 nVidia에서 개발한 CUDA (Compute Unified Device Architecture) 환경은 자사의 GPU 프로그램 개발을 위해 제공되는 개발 환경이다. CUDA 개발 환경은 nVidia GPU 프로그래밍 뿐만 아니라 차세대 이종 병렬 프로그램 개발 환경의 공개 표준으로 논의되고 있는 OpenCL (Open Computing Language) 와 유사한 특징을 보일 것으로 예상되기 때문에 그 중요성은 특정 GPU 에만 국한되지 않는다. 본 논문에서는 경로 적분 몬테 카를로 (Path Integral Monte Carlo) 방법을 CUDA 개발 환경을 사용하여 nVidia GPU 상에서 병렬화한 결과를 제시하였다.

• The Journal of the Korea Contents Association
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• v.12 no.5
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• pp.10-21
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• 2012

The role of GPU has evolved from graphics-specific processing to general-purpose processing with the development of unified shader core architecture. Especially, execution methods for general-purpose parallel applications using GPU have been researched intensively, since the parallel hardware architecture can be utilized efficiently when the parallel applications are executed. However, current GPU architecture has limitations in executing general-purpose parallel applications, since the GPU is not specialized for general-purpose computing yet. To improve the GPU performance when general-purpose parallel applications are executed, the GPU architecture should be evolved. In this work, we analyze the GPU performance according to the architecture varying the number of cores and clock frequency. Our simulation results show that the GPU performance improves by up to 125.8% and 16.2% as the number of cores increases and the clock frequency increases, respectively. However, note that the improvement of the GPU performance is saturated even though the number of cores increases and the clock frequency increases continuously, since the data cannot be provided to the GPU due to the limit of memory bandwidth. Consequently, to accomplish high performance effectiveness on GPU, computational resources must be more suitably considered.

• 한국HCI학회:학술대회논문집
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• 2009.02a
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• pp.436-442
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• 2009

Tomography images reconstructed from conebeam CT make it possible to observe inside of the projected object without any damage, and so it has been widely used in the industrial and medical fields. Recent advanced imaging equipment can produce high-resolution CT images. However, it takes much time to reconstruct the obtained large dataset. To reduce the time to reconstruct CT images, we propose an accelerating method using GPU (graphics processing unit). Reconstruction consists of mainly two parts, filtering and back-projection. In filtering phase, we applied 4ch image compression method and in back-projection phase, computation reduction method using depth test is applied. The experimental results show that the proposed method accelerates the speed 50 times than the CPU-based program optimized with OpenMP by utilizing the high-computing power of parallelized GPU.

• Proceedings of the Korean Society of Broadcast Engineers Conference
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• 2014.11a
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• pp.236-239
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• 2014

3차원 영상을 제작하기 위해서는 여러 시점의 색상 영상과 함께 깊이 정보를 필요로 한다. 하지만 깊이 정보를 얻을 때 사용하는 ToF 카메라는 해상도가 낮으며 적외선 신호의 주파수 문제 때문에 최대 3대까지 사용할 수 있다. 따라서 깊이 정보를 색상 영상과 함께 사용하기 위해서 깊이 정보의 업샘플링이 필수적이다. 업샘플링은 깊이 정보를 색상 카메라 위치로 3차원 워핑하고 결합형 양방향 필터(joint bilateral filter, JBF)를 사용하여 빈 영역을 채우는 방법으로 진행된다. 업샘플링은 오랜 시간이 소요되지만 그래픽스 프로세싱 유닛(graphics processing units, GPU)를 이용하여 빠르게 수행될 수 있다. 본 논문에서는 다중 GPU의 병렬 수행을 통하여 빠르게 다시점 깊이맵을 생성할 수 있는 방법을 제안한다. 다중 GPU 병렬 수행은 범용 목적 GPU(general purpose computing on GPU, GPGPU) 중의 하나인 CUDA를 이용하였으며, 본 논문에서 제안된 방법을 이용하여 3개의 GPU 사용한 실험 결과 초당 35 프레임의 다시점 깊이맵을 생성했다.

• Journal of the Korea Society of Computer and Information
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• v.25 no.2
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• pp.11-19
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• 2020

Modern GPU can execute general purpose computation on the graphic processing unit, and provide high performance by exploiting many core on GPU. To run AES algorithm efficiently, parallel computational resources are required. However, computational resource of CPU architecture are not enough to cryptographic algorithm such as AES whereas GPU architecture has mass parallel computation resources. Therefore, this paper reduce the time to execute AES by employing parallel computational resource on GPGPU. Unfortunately, AES cannot utilize computational resource on GPGPU since it isn't suitable to GPGPU architecture. In this paper, IPC based dynamic SM management technique are proposed to efficiently execute AES on GPGPU. IPC based dynamic SM management can increase and decrease the number of active SMs by using IPC in run-time. According to simulation results, proposed technique improve the performance by increasing resource utilization compared to baseline GPGPU architecture. The results show that AES improve the performance by 41.2% on average.