• Title/Summary/Keyword: 반송파 복원 루프

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A SNR Estimation Algorithm for Digital Satellite Transponder (디지털 위성트랜스폰더를 위한 SNR 추정 알고리즘)

  • Seo, Kwang-Nam;Choi, Seung-Woon;Kim, Chong-Hoon
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.35 no.9C
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    • pp.729-734
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    • 2010
  • In the initial stage of the communications between a base station and a satellite transponder, the base station transmits the frequency-sweeping un-modulated up-link carrier within a certain frequency range to acquire the doppler frequency shift and signal power between the base station and the satellite in orbital flight. The satellite transponder acquires and tracks the carrier in order to initialize the communication. To control such initialization process, the satellite receiver should analyze the input carrier signal in various ways. This paper presents an SNR estimation algorithm to control the initialization process. The proposed algorithm converts the input signal into the baseband polar coordinate representation and estimates the SNR via the statistics of the angular signal components as well as the status parameters to control the receiver. The Monte-Carlo simulations shows the validity of the estimation proposed.

Study on the Low-Power Carrier Recovery for Digital Satellite Broadcasting Demodulator (DSBD를 위한 저전력 반송파 복원에 관한 연구)

  • Park, Hyoung-Keun;Lee, Seung-Dae
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.11 no.4
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    • pp.773-778
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    • 2007
  • In order to resolve problems with the phase error in QPSK demodulator of the digital satellite broadcasting systems, the demodulator requires carrier recovery loop which searches for the frequency and phase of the carrier. In this paper the complexity of implementation is reduced by the reduction into half of the number of the multiplier in Inter structure of the conventional carrier recovery loop, and as the drawback of NCO of the conventional carrier recovery loop wastes a amount of power for the structure of lookup table, We designed the structure of combinational logic without the lookup table. In the comparison with dynamic power of the proposed NCO, the power of NCO with the lookup table is $175{\mu}W$, NCO with the proposed structure is $24.65{\mu}W$. As the result, it is recognized that about one eight of loss power is reduced. In the simulation of carrier recovery loop designed QPSK demodulator, it is known that the carrier phase is compensated.

Synchronization performance optimization using adaptive bandwidth filter and average power controller over DTV system (DTV시스템에서 평균 파워 조절기와 추정 옵셋 변화율에 따른 대역폭 조절 필터를 이용한 동기 성능 최적화)

  • Nam, Wan-Ju;Lee, Sung-Jun;Sohn, Sung-Hwan;Kim, Jae-Moung
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.44 no.5
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    • pp.45-53
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    • 2007
  • To recover transmitted signal perfectly at DTV receiver, we have to acquire carrier frequency synchronization to compensate pilot signal which located in wrong position and rotated phase. Also, we need a symbol timing synchronization to compensate sampling timing error. Conventionally, to synchronize symbol timing, we use Gardner's scheme which used in multi-level signal. Gardner's scheme is well known for its sampling the timing error signal from every symbol and it makes easy to detect and keep timing sync in multi-path channel. In this paper, to discuss the problem when the received power level is out of range and we cannot get synchronization information. With this problem, we use 2 step procedures. First, we put a received signal power compensation block before Garder's timing error detector. Second, adaptive loop filter to get a fast synchronization information and averaging loop filter's output value to reduce the amount of jitter after synchronization in PLL(Phased Locked Loop) circuit which is used to get a carrier frequency synchronization and symbol timing synchronization. Using the averaging value, we can estimate offset. Based on offset changing ratio, we can adapt adaptive loop filter to carrier frequency and symbol timing synchronization circuit.