• Title/Summary/Keyword: 반복설계알고리듬

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Development of RAW Data Storage Equipment for Operation Algorithm research of the Millimeter Wave Tracking Radar (밀리미터파 추적레이더 운용 알고리듬 연구를 위한 RAW 데이터 저장 장비 개발)

  • Choi, Jinkyu;Na, Kyoung-Il;Shin, Youngcheol;Hong, Soonil;Kim, Younjin;Kim, Hongrak;Joo, Jihan;Kim, Sosu
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.22 no.3
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    • pp.57-62
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    • 2022
  • Recently, the tracking radar continues research to develop a new operation algorithm that can acquire and track a target in various environments. In general, modeling similar to the real target and environment is used to develop a new operation algorithm, but there is a limit to modeling the real environment. In this paper, a RAW data storage device was developed to efficiently develop a new operation algorithm required for the tracking radar using millimeter wave to acquire and track the target. The RAW data storage equipment is designed so that the signal processing device of the tracking radar using millimeter wave can save the RAW data output from 8 channels to OOOMSPS. RAW data storage equipment consists of data acquisition equipment and data storage equipment. The data acquisition equipment was implemented using a commercial Xilinx KCU 105 Evaluation KIT capable of high-speed data communication interface, and the data storage equipment was implemented by applying a computer compatible with the commercial Xilinx KCU 105 Evaluation KIT. In this paper, the performance of the implemented RAW data storage equipment was verified through repeated interlocking tests with the signal processing device of the millimeter wave tracking radar.

Captive Flight Test POD System Design for Effective Development in Weapon System (무기체계의 효과적인 개발을 위한 항공탑재시험용 POD 시스템 설계)

  • Park, JungSoo
    • Journal of the Korea Convergence Society
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    • v.9 no.6
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    • pp.25-31
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    • 2018
  • Captive Flight Test (CFT) is one of the most important tests to acquire data when developing complex weapon systems. In this paper, we introduce the design and test result of our POD system for CFT. POD system uses POD set which consists of left and right POD. The exterior and mass properties of POD set are equal to those of fuel tank for aircraft so that we can omit Airworthiness Certification. Also, we adequately placed inner-equipments in order to acquire data including target image, navigation result and reference data to verify and analyse software algorithm. The POD system for CFT we developed is complex system as both mechanical and electronic factors are applied. As we repeatedly performed CFT, useful and various data for weapon development were acquired.

Design Algorithm of Flexible Propeller by Fluid-Structure Interactive Analysis (유체-구조 반복해석법에 의한 유연 프로펠러의 설계 알고리듬 개발)

  • Jang, Hyun-Gil;Nho, In Sik;Hong, Chang-Ho;Lee, Chang-Sup
    • Journal of the Society of Naval Architects of Korea
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    • v.49 no.6
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    • pp.528-533
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    • 2012
  • Flexible composite propellers are subject to large deformation under heavy loading, and hence the hydrodynamic performance of deformed propeller might deviate from that of the metallic propeller under negligible deformation. To design the flexible propeller, it is therefore necessary to be able to evaluate the structural response of the blades to the hydrodynamic loadings, and then the influence of the blade deformation upon the hydrodynamic loadings. We use the lifting-surface-theory-based propeller analysis and design codes in solving the hydrodynamic problem, and the finite-element-method program formulated with 20-node iso-parametric solid elements for the analysis of the structural response. The two different hydrodynamic and structural programs are arranged to communicate through the carefully-designed interface scheme which leads to the derivation of the geometric parameters such as the pitch, the rake and the skew distributions common to both programs. The design of flexible propellers, suitable for manufacturing, is shown to perform the required thrust performance when deformed in operation. Sample design shows the fast iteration scheme and the robustness of the design procedure of the flexible propellers.

An analysis of BER performance of LDPC decoder for WiMAX (WiMAX용 LDPC 복호기의 비트오율 성능 분석)

  • Kim, Hae-Ju;Shin, Kyung-Wook
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2010.05a
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    • pp.771-774
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    • 2010
  • In this paper, BER performance of LDPC(Low-Density Parity-Check) decoder for WiMAX is analyzed, and optimal design conditions of LDPC decoder are derived. The min-sum LDPC decoding algorithm which is based on an approximation of LLR sum-product algorithm is modeled and simulated by Matlab, and it is analyzed that the effects of LLR approximation bit-width and maximum iteration cycles on the bit error rate(BER) performance of LDCP decoder. The parity check matrix for IEEE 802.16e standard which has block length of 2304 and code rate of 1/2 is used, and AWGN channel with QPSK modulation is assumed. The simulation results show that optimal BER performance is achieved for 7 iteration cycles and LLR bit-width of (8,6).

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Analysis of Microwave Inverse Scattering Using the Broadband Electromagnetic Waves (광대역 전자파를 이용한 역산란 해석 연구)

  • Lee Jung-Hoon;Chung Young-Seek;So Joon-Ho;Kim Junyeon;Jang Won
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.17 no.2 s.105
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    • pp.158-164
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    • 2006
  • In this paper, we proposed a new algorithm of the inverse scattering for the reconstruction of unknown dielectric scatterers using the finite-difference time-domain method and the design sensitivity analysis. We introduced the design sensitivity analysis based on the gradient information for the fast convergence of the reconstruction. By introducing the adjoint variable method for the efficient calculation, we derived the adjoint variable equation. As an optimal algorithm, we used the steepest descent method and reconstructed the dielectric targets using the iterative estimation. To verify our algorithm, we will show the numerical examples for the two-dimensional $TM^2$ cases.

Structural Design Optimization of Lightweight Offshore Helidecks Using a Genetic Algorithm and AISC Standard Sections (유전 알고리듬 및 AISC 표준 단면을 사용한 경량화 헬리데크 구조 최적설계)

  • Sim, Kichan;Kim, Byungmo;Kim, Chanyeong;Ha, Seung-Hyun
    • Journal of the Computational Structural Engineering Institute of Korea
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    • v.32 no.6
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    • pp.383-390
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    • 2019
  • A helideck is one of the essential structures in offshore platforms for the transportation of goods and operating personnel between land and offshore sites. As such, it should be carefully designed and installed for the safety of the offshore platform. In this study, a structural design optimization method for a lightweight offshore helideck is developed based on a genetic algorithm and an attainable design set concept. A helideck consists of several types of structural members such as plates, girders, stiffeners, trusses, and support elements, and the dimensions of these members are typically pre-defined by manufacturers. Therefore, design sets are defined by collecting the standard section data for these members from the American Institute of Steel Construction (AISC), and integer section labels are assigned as design variables in the genetic algorithm. The objective is to minimize the total weight of the offshore helideck while satisfying the maximum allowable stress criterion under various loading conditions including self-weight, wind direction, landing position, and landing condition. In addition, the unity check process is also utilized for additional verification of structural safety against buckling failure of the helideck.

A Cryptoprocessor for AES-128/192/256 Rijndael Block Cipher Algorithm (AES-128/192/256 Rijndael 블록암호 알고리듬용 암호 프로세서)

  • 안하기;박광호;신경욱
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.6 no.3
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    • pp.427-433
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    • 2002
  • This paper describes a design of cryptographic processor that implements the AES(Advanced Encryption Standard) block cipher algorithm "Rijndael". To achieve high throughput rate, a sub-pipeline stage is inserted into the round transformation block, resulting that the second half of current round function and the first half of next round function are being simultaneously operated. For area-efficient and low-power implementation, the round block is designed to share the hardware resources in encryption and decryption. An efficient scheme for on-the-fly key scheduling, which supports the three master-key lengths of 128-b/192-b/256-b, is devised to generate round keys in the first sub-pipeline stage of each round processing. The cryptoprocessor designed in Verilog-HDL was verified using Xilinx FPGA board and test system. The core synthesized using 0.35-${\mu}{\textrm}{m}$ CMOS cell library consists of about 25,000 gates. Simulation results show that it has a throughput of about 520-Mbits/sec with 220-MHz clock frequency at 2.5-V supply.-V supply.

A 3-stage Pipelined Architecture for Multi-View Images Decoder3 (단계 파이프라인 구조를 갖는 Multi-View 영상 디코더)

  • Bae, Chang-Ho;Yang, Yeong-Yil
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.39 no.4
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    • pp.104-111
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    • 2002
  • In this paper, we proposed the architecture of the decoder which implements the multi-view images decoding algorithm. The study of the hardware structure of the multi-view image processing has not been accomplished. The proposed multi-view images decoder operates in a three stage pipelined manner and extracts the depth of the pixels of the decoded image every clock. The multi-view images decoder consists of three modules, Node selector which transfers the value of the nodes repeatedly and Depth Extractor which extracts the depth of each pixel from the four values of the nodes and Affine transformer which generates the projecting position on the image plane from the values of the pixels and the specified viewpoint. The proposed architecture is designed and simulated by the Max+plus II design tool and the operating frequency is 30MHz. The image can be constructed in a real time by the decoder with the proposed architecture.

An Implementation of Stable Optical Security System using Interferometer and Cascaded Phase Keys (간섭계와 직렬 위상 키를 이용한 안정한 광 보안 시스템의 구현)

  • Kim, Cheol-Su
    • Journal of Korea Society of Industrial Information Systems
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    • v.12 no.1
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    • pp.101-107
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    • 2007
  • In this paper, we proposed an stable optical security system using interferometer and cascaded phase keys. For the encryption process, a BPCGH(binary phase computer generated hologram) that reconstructs the origial image is designed, using an iterative algorithm and the resulting hologram is regarded as the image to be encrypted. The BPCGH is encrypted through the exclusive-OR operation with the random generated phase key image. For the decryption process, we cascade the encrypted image and phase key image and interfere with reference wave. Then decrypted hologram image is transformed into phase information. Finally, the origianl image is recovered by an inverse Fourier transformation of the phase information. During this process, interference intensity is very sensitive to external vibrations. a stable interference pattern is obtained using self-pumped phase-conjugate minor made of the photorefractive material. In the proposed security system, without a random generated key image, the original image can not be recovered. And we recover another hologram pattern according to the key images, so can be used an authorized system.

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Non-Intrusive Speech Quality Estimation of G.729 Codec using a Packet Loss Effect Model (G.729 코덱의 패킷 손실 영향 모델을 이용한 비 침입적 음질 예측 기법)

  • Lee, Min-Ki;Kang, Hong-Goo
    • The Journal of the Acoustical Society of Korea
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    • v.32 no.2
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    • pp.157-166
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    • 2013
  • This paper proposes a non-intrusive speech quality estimation method considering the effects of packet loss to perceptual quality. Packet loss is a major reason of quality degradation in a packet based speech communications network, whose effects are different according to the input speech characteristics or the performance of the embedded packet loss concealment (PLC) algorithm. For the quality estimation system that involves packet loss effects, we first observe the packet loss of G.729 codec which is one of narrowband codec in VoIP system. In order to quantify the lost packet affects, we design a classification algorithm only using speech parameters of G.729 decoder. Then, the degradation values of each class are iteratively selected that maximizes the correlation with the degradation PESQ-LQ scores, and total quality degradation is modeled by the weighted sum. From analyzing the correlation measures, we obtained correlation values of 0.8950 for the intrusive model and 0.8911 for the non-intrusive method.