• Journal of the Korean Institute of Intelligent Systems
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• v.8 no.2
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• pp.60-69
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• 1998

This paper proposes a speech synthesis method using Fuzzy VQ, and then study how to make choice of fuzziness value which optimizes (controls) the performance of FVQ in order to obtain the synthesized speech which is closer to the original speech. When FVQ is used to synthesize a speech, analysis stage generates membership function values which represents the degree to which an input speech pattern matches each speech patterns in codebook, and synthesis stage reproduces a synthesized speech, using membership function values which is obtained in analysis stage, fuzziness value, and fuzzy-c-means operation. By comparsion of the performance of the FVQ and VQ synthesizer with simmulation, we show that, although the FVQ codebook size is half of a VQ codebook size, the performance of FVQ is almost equal to that of VQ. This results imply that, when Fuzzy VQ is used to obtain the same performance with that of VQ in speech synthesis, we can reduce by half of memory size at a codebook storage. And then we have found that, for the optimized FVQ with maximum SQNR in synthesized speech, the fuzziness value should be small when the variance of analysis frame is relatively large, while fuzziness value should be large, when it is small. As a results of comparsion of the speeches synthesized by VQ and FVQ in their spectrogram of frequency domain, we have found that spectrum bands(formant frequency and pitch frequency) of FVQ synthesized speech are closer to the original speech than those using VQ.

• Journal of the Institute of Electronics and Information Engineers
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• v.52 no.4
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• pp.80-87
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• 2015

Memristor is a new kind of memory device whose resistance varies depending upon applied charge and whose previous resistance state is preserved even when its power is off. Ordinary memristor has a nonlinear programming characteristics about time when a constant voltage is applied. For the easiness of programming, it is desirable that resistance is programmed linearly about time. We had proposed previously a memristor bridge configuration with which weight can be programmed nicely in positive, negative or zero. In memristor bridge circuit, two memristors are connected in series with different polarity. Memristors are complementary each other and it follows that the memristance variation is linear with respect to time. In this paper, the linearization effect of weight programming of memristor bridge synapse is investigated and verified about both $TiO_2$ memristor from HP and a nonlinear memristor with a window function. Memristor bridge circuit would be helpful to conduct synaptic weight programming.

• Journal of agriculture & life science
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• v.44 no.4
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• pp.69-77
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• 2010

Fuzzy control is widely used for improving temperature control performance as controlling ventilation in greenhouse because the technique can respond more flexibly to the outside air temperature and wind speed. By pre-studied PID and normal fuzzy control this study was performed to obtain the fundamental data that can be established in better greenhouse ventilation control method. The temperature control error by the simple fuzzy control was $1.2^{\circ}C$. The accumulated operating size of the window and the number of operating were 84% and 13, respectively. These showed equivalent control performance with pre-studied result that control error. The accumulated operating size of the window and the number of operating were 75% and 12, respectively. The proposed fuzzy technique was simple control logic method compared with step and PID control methods, but it showed equivalent performance. Therefore, the proposed simple fuzzy control method could be used in micro controller of small programmable memory size and many applications.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.29 no.5
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• pp.1039-1048
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• 2019

Symbolic execution, an automatic search method for vulnerability verification, has been technically improved over the last few years. However, it is still not practical to analyze the program using only the symbolic execution itself. One of the biggest reasons is that because of the path explosion problem that occurs during program analysis, there is not enough memory, and you can not find the solution of all paths in the program using symbolic execution. Thus, it is practical for the analyst to construct a path for symbolic execution to a target with vulnerability rather than solving all paths. In this paper, we propose a static analysis - based backward CFG(Control Flow Graph) generation technique that can be used in symbolic execution for program analysis. With the creation of a backward CFG, an analyst can select potential vulnerable points, and the backward path generated from that point can be used for future symbolic execution. We conducted experiments with Linux binaries(x86), and indeed showed that potential vulnerability selection and backward CFG path generation were possible in a variety of binary situations.

• Journal of the Korea Society of Computer and Information
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• v.15 no.9
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• pp.35-46
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• 2010

Sequential pattern mining is one of the essential data mining tasks, and it is widely used to analyze data generated in various application fields such as web-based applications, E-commerce, bioinformatics, and USN environments. Recently data generated in the application fields has been taking the form of continuous data streams rather than finite stored data sets. Considering the changes in the form of data, many researches have been actively performed to efficiently find sequential patterns over data streams. However, conventional researches focus on reducing processing time and memory usage in mining sequential patterns over a target data stream, so that a research on mining more interesting and useful sequential patterns that efficiently reflect the characteristics of the data stream has been attracting no attention. This paper proposes a mining method of sequential patterns over data streams with a gap constraint, which can help to find more interesting sequential patterns over the data streams. First, meanings of the gap for a sequential pattern and gap-constrained sequential patterns are defined, and subsequently a mining method for finding gap-constrained sequential patterns over a data stream is proposed.

• Journal of the Korea Society of Computer and Information
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• v.18 no.12
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• pp.1-9
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• 2013

Even though the multiple pages TLB are effective in improving the performance, a conventional method with OS support cannot utilize multiple page sizes in user application. Thus, we propose a new multiple-TLB structure supporting multiple page sizes for high performance and low power consumption without any operating system support. The proposed TLB is organised as two parts of a S-TLB(Small TLB) with a small page size and a L-TLB(Large TLB) with a large page size. Both are designed as fully associative bank structures. The S-TLB stores small pages are evicted from the L-TLB, and the L-TLB stores large pages including a small page generated by the CPU. Each one bank module of S-TLB and L-TLB can be selectively accessed base on particular one and two bits of the virtual address generated from CPU, respectively. Energy savings are achieved by reducing the number of entries accessed at a time. Also, this paper proposed the simple 1-bit LRU policy to improve the performance. The proposed LRU policy can present recently referenced block by using an additional one bit of each entry on TLBs. This method can simply select a least recently used page from the L-TLB. According to the simulation results, the proposed TLB can reduce Energy * Delay by about 76%, 57%, and 6% compared with a fully associative TLB, a ARM TLB, and a Dual TLB, respectively.

• Journal of the Korean Magnetics Society
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• v.17 no.3
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• pp.124-127
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• 2007

Magnetic tunnel junctions (MTJs), which consisted of amorphous CoFeSiB layers, were investigated. The CoFeSiB layers were used to substitute for the traditionally used CoFe and/or NiFe layers with an emphasis given on understanding the effect of the amorphous free layer on the switching characteristics of the MTJs. CoFeSiB has a lower saturation magnetization ($M_s\;:\;560\;emu/cm^3$) and a higher anisotropy constant ($K_u\;:\;2800\;erg/cm^3$) than CoFe and NiFe, respectively. An exchange coupling energy ($J_{ex}$) of $-0.003\;erg/cm^2$ was observed by inserting a 1.0 nm Ru layer in between CoFeSiB layers. In the Si/$SiO_2$/Ta 45/Ru 9.5/IrMn 10/CoFe 7/$AlO_x$/CoFeSiB 7 or CoFeSiB (t)/Ru 1.0/CoFeSiB (7-t)/Ru 60 (in nm) MTJs structure, it was found that the size dependence of the switching field originated in the lower $J_{ex}$ using the experimental and simulation results. The CoFeSiB synthetic antiferromagnet structures were proved to be beneficial for the switching characteristics such as reducing the coercivity ($H_c$) and increasing the sensitivity in micrometer size, even in submicrometer sized elements.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.31 no.5
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• pp.875-888
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• 2021

In this paper, we search integral distinguishers of lightweight block cipher PIPO and propose a key recovery attack on 8-round PIPO-64/128 with the obtained 6-round distinguishers. The lightweight block cipher PIPO proposed in ICISC 2020 is designed to provide the efficient implementation of high-order masking for side-channel attack resistance. In the proposal, various attacks such as differential and linear cryptanalyses were applied to show the sufficient security strength. However, the designers leave integral attack to be conducted and only show that it is unlikely for PIPO to have integral distinguishers longer than 5-round PIPO without further analysis on Division Property. In this paper, we search integral distinguishers of PIPO using a MILP-aided Division Property search method. Our search can show that there exist 6-round integral distinguishers, which is different from what the designers insist. We also consider linear operation on input and output of distinguisher, respectively, and manage to obtain totally 136 6-round integral distinguishers. Finally, we present an 8-round PIPO-64/128 key recovery attack with time complexity 2^124.5849 and memory complexity of 2⁹³ with four 6-round integral distinguishers among the entire obtained distinguishers.

• The Journal of Korean Institute of Next Generation Computing
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• v.15 no.2
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• pp.39-49
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• 2019

Recently, CPU-GPU integrated heterogeneous multicore processors have been widely used for improving the performance of computing systems. Heterogeneous multicore processors integrate CPUs and GPUs on a single chip where CPUs and GPUs share the LLC(Last Level Cache). This causes a serious cache contention problem inside the processor, resulting in significant performance degradation. In this paper, we propose the partitioned LLC architecture to solve the cache contention problem in heterogeneous multicore processors. We analyze the performance impact varying the LLC size of CPUs and GPUs, respectively. According to our simulation results, the bigger the LLC size of the CPU, the CPU performance improves by up to 21%. However, the GPU shows negligible performance difference when the assigned LLC size increases. In other words, the GPU is less likely to lose the performance when the LLC size decreases. Because the performance degradation due to the LLC size reduction in GPU is much smaller than the performance improvement due to the increase of the LLC size of the CPU, the overall performance of heterogeneous multicore processors is expected to be improved by applying partitioned LLC to CPUs and GPUs. In addition, if we develop a memory management technique that can maximize the performance of each core in the future, we can greatly improve the performance of heterogeneous multicore processors.

• Journal of Broadcast Engineering
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• v.26 no.2
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• pp.125-131
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• 2021

In recent years, Convolutional Neural Networks (CNNs) have achieved outstanding performance in the fields of computer vision such as image classification, object detection, visual quality enhancement, etc. However, as huge amount of computation and memory are required in CNN models, there is a limitation in the application of CNN to low-power environments such as mobile or IoT devices. Therefore, the need for neural network compression to reduce the model size while keeping the task performance as much as possible has been emerging. In this paper, we propose a method to compress CNN models by combining matrix decomposition methods of LR (Low-Rank) approximation and CP (Canonical Polyadic) decomposition. Unlike conventional methods that apply one matrix decomposition method to CNN models, we selectively apply two decomposition methods depending on the layer types of CNN to enhance the compression performance. To evaluate the performance of the proposed method, we use the models for image classification such as VGG-16, RestNet50 and MobileNetV2 models. The experimental results show that the proposed method gives improved classification performance at the same range of 1.5 to 12.1 times compression ratio than the existing method that applies only the LR approximation.