• Title/Summary/Keyword: 리시버

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Effect of Liquid Level and Mass Flow Rate on Subcooling of Vertical Refrigeration Receiver Having a Large Aspect Ratio (액 수위와 유량이 세장비가 큰 냉동용 수직 리시버의 과냉에 미치는 영향)

  • Kim, Nae-Hyun
    • Korean Journal of Air-Conditioning and Refrigeration Engineering
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    • v.29 no.7
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    • pp.385-389
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    • 2017
  • Generally, refrigerant temperature out of the receiver is assumed to be saturated. This may be true for horizontal or vertical receivers having small aspect ratio. However, this assumption needs verification for vertical receiver having large aspect ratio. No study has reported information on this issue. The objective of this study was to determine the effect of liquid level and mass flow rate on liquid subcooling of a long vertical receiver using R-410A. During the test, inlet subcooling was maintained at $5^{\circ}C$ while saturation temperature was maintained at $10^{\circ}C$. Results showed that subcooling was maintained for the long vertical receiver. Subcooling preservation ratio (ratio of exit to inlet subcooling) was increased as mass flow rate or liquid level was increased. As a whole, 50 to 70% subcooling preservation was possible for the present receiver. Further investigations are needed to enhance information on this issue using receivers having different aspect ratios.

Adaptive Power Saving Mechanism of Low Power Wake-up Receivers against Battery Draining Attack (배터리 소모 공격에 대응하는 저전력 웨이크업 리시버의 적응형 파워 세이빙 메커니즘)

  • So-Yeon Kim;Seong-Won Yoon;Il-Gu Lee
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.34 no.3
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    • pp.393-401
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    • 2024
  • Recently, the Internet of Things (IoT) has been widely used in industries and daily life that directly affect human safety, life, and assets. However, IoT devices, which need to meet low-cost, lightweight, and low-power requirements, face a significant problem of shortened battery lifetime due to battery draining attacks and interference. To solve this problem, the 802.11ba standard for the Wake-up Receiver (WuR) has emerged, this feature is playing a crucial role in minimizing energy consumption. However, the WuR protocol did not consider security mechanisms in order to reduce latency and overhead. Therefore, in this study, anAdaptive Power Saving Mechanism (APSM) is proposed for low-power WuR to counter battery draining attacks. APSM can minimize abnormally occurring power consumption by exponentially increasing power-saving time in environments prone to attacks. According to experimental results, the proposed APSM improved energy consumption efficiency by a minimum of 13.77% compared to the traditional Legacy Power Saving Mechanism (LPSM) when attack traffic ratio is 10% or more of the total traffic.

PAM4의 측정과 시뮬레이션 상관관계

  • Lee, Gi-Eung
    • The Proceeding of the Korean Institute of Electromagnetic Engineering and Science
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    • v.27 no.3
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    • pp.51-56
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    • 2016
  • 시뮬레이션/측정 상관관계를 파악하려면 송신기(Tx), 리시버(Rx), 채널의 정확한 모델링이 필요하다. 또한, 표준 채널, 케이블, 픽스쳐, RF 스위치 등 실제 실험실 시나리오에서 신호에 영향을 받는 모든 것을 고려해야 한다. 연결된 각 요소가 받는 영향을 정량화하고, 모델을 이용해 시뮬레이션과 측정 작업 흐름 모두에 이 수치를 포함시키면, 설계 단계와 검증 단계 사이의 차이를 줄일 수 있어 결함을 조기에 발견하고 해결할 수 있게 된다.

Design of a Single Chip CMOS Transceiver for the Fiber Optic Modules (광통신 모듈용 단일칩 CMOS 트랜시버의 설계)

  • 채상훈;김태련;권광호
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.41 no.2
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    • pp.1-8
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    • 2004
  • This paper describes the design of monolithic optical transceiver circuitry being used as a part of the fiber optic modules. It has been designed in 0.6 ${\mu}{\textrm}{m}$ 2-poly 3 metal silicon CMOS analog technology and operates at 155.52 Mbps(STM-1) data rates. It drives laser diode to transmit intensity modulated optical signal according to 155.52 Mbps electrical data from system. Also, it receives 155.52 Mbps optical data that transmitted from other systems and converts it to electrical data using photo diode and amplifier. To avoid noise and interference between transmitter and receiver on one chip, layout techniques such as special placement, power supply separation, guard ring, and protection wall were used in the design. The die area is 4 ${\times}$ 4 $\textrm{mm}^2$ and the estimated power dissipation is less than 900 ㎽ with a single 5 V supply.

Implementation of a Single Chip CMOS Transceiver for the Fiber Optic Modules (광통신 모듈용 단일 칩 CMOS트랜시버의 구현)

  • 채상훈;김태련
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.41 no.9
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    • pp.11-17
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    • 2004
  • This paper describes the implementation of monolithic optical transceiver circuitry being used as a part of the fiber optic modules. It has been fabricated in 0.6 ${\mu}{\textrm}{m}$ 2-poly 3-metal silicon CMOS analog technology and operates at 155.52 Mbps(STM-1) data rates. It drives laser diode to transmit intensity modulated optical signal according to 155.52 Mbps electrical data from system. Also, it receives 155.52 Mbps optical data that transmitted from other systems and converts it to electrical data using photo diode and amplifier. To avoid noise and interference between transmitter and receiver on one chip, layout techniques such as special placement, power supply separation, guard ring, and protection wall were used in the design. The die area is 4 ${\times}$ 4 $\textrm{mm}^2$, and it has 32.3 ps rms and 335.9 ps peak to peak jitter on loopback testing. the measured power dissipation of whole chip is 1.15 W(230 mW) with a single 5 V supply.

Design of single-chip NFC transceiver (단일 칩 NFC 트랜시버의 설계)

  • Cho, Jung-Hyun;Kim, Shi-Ho
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.44 no.1
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    • pp.68-75
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    • 2007
  • A single chip NFC transceiver supporting not only NFC active and passive mode but also 13.56MHz RFID reader and tag mode was designed and fabricated. The proposed NFC transceiver can operate as a RFID tag even without external power supply which has dual antenna structure for initiator and target. The area increment due to additional target antenna is negligible because the target antenna is constructed by using a shielding layer of initiator antenna. The analog front end circuit of the proposed NFC transceiver consists of a transmitter and receiver of reader/writer block supporting NFC initiator or RFID reader mode, and a tag circuit for target of passive NFC mode or RFID tag mode. The maximum baud rate of the proposed NFC device is 212kbps by using UART serial interface. The chip has been designed and fabricated using a Magnachip's $0.35{\mu}m$ double poly 4-metal CMOS process, and the effective area of the chip is 2200um by 3600um.

A Novel Clock Distribution Scheme for High Performance System and A Structural Analysis of Coplanar and Microstrip Transmission Line (고성능 시스템을 위한 클록 분배 방식 및 Coplanar 및 Microstrip 전송라인의 구조적 분석)

  • Park, Jung-Keun;Moon, Gyu;Wee, Jae-Kyung
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.41 no.4
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    • pp.1-8
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    • 2004
  • A novol clock distribution scheme is proposed for high-speed and low-power digital system to minimize clock skew and reduce dynamic power consumption. This scheme has ideal zero-skew characteristic by using folded clock lines (FCL) and phase blending circuit. For analyzing suitable line structures to FCLs, microstrip line and coplanar line are placed with folded clock lines. Simulation results show that the maximum clock-skew between two receivers located 10mm apart is less than lops at 1㎓ and the maximum clock-skew between two receivers located 20mm apart is less than 60ps at 1㎓. Also the results show that the minimum skews of clock signals regardless of process, voltage, and temperature variation are invariant.

Performance Analysis of Integral Receiver/Dryer Condenser for Automobile (자동차용 리시버/건조기 일체형 응축기의 성능해석)

  • Won, Sung-Pil
    • Korean Journal of Air-Conditioning and Refrigeration Engineering
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    • v.19 no.3
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    • pp.245-252
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    • 2007
  • The important problems from the point of view of preventing global warming are to save the power consumption of automotive air-conditioning systems and reduce the refrigerant amount filled. To achieve such requirements, integral receiver/dryer (R/D) condensers were developed recently. Typical integral R/D condensers have extra headers that play the role of R/D. Except an extra header and somewhat complex tube array resulting from the extra header, the most integral R/D condensers have almost the same specification that tube has multi channels, fin has louvers, flow in tube is parallel, etc. When integral condensers are applied, it is known that the refrigerating effect increases, resulting from the increase of subcooling degree in condenser, and the refrigerant amount used saves. In spite of several merits, integral condensers have not been applied a lot. That is why there is an uncertainty in performance, using integral condensers. The objective of this study is to theoretically optimize the tube array in an integral R/D condenser that is really being applied to some vehicles. The tube array has a great effect on the performance of the integral condenser as well as common ones. Through computer simulation, we could see that the tube array, 14-6-3-5-3-4, in the same condenser was the best, comparing heat release rate, pressure drop, etc. to the real array, 17-5-3-3-2-5. It should be noted that the optimization is based on the condenser performance only.

A Study of the WPT Module Using Inductive Coupling for the Convergence Applications (융합형 어플리케이션을 위한 자기유도 방식의 무선전력전송 모듈설계에 대한 연구)

  • Jeong, Byeong-Ho;Park, Ju-Hoon;Kang, Bo-An
    • Journal of the Korea Convergence Society
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    • v.6 no.2
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    • pp.57-64
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    • 2015
  • Inductive Power Transfer (IPT) systems have successfully been developed and used to replace traditional conductive power transfer systems where physical connection is either inconvenient or impossible, such as biomedical implants, undersea vehicles, and contactless battery chargers of robots, for providing power to movable or detachable loads. Inductive Coupling uses magnetic fields to transfer power. There is a primary coil, which generates a magnetic field. Then there is another secondary coil which is composed of a capacitor and a coil, the capacitor creates a circuit with the primary and secondary coils. This paper discusses design method and several implementation alternatives for wireless energy transmission systems. It presents realization examples for these alternatives. Wireless energy transmission is investigated in numerous convergence applications due to its simplicity and advantages.

신경세포의 전기적 속성과 수학적 모델

  • 서병설
    • The Magazine of the IEIE
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    • v.5 no.2
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    • pp.31-40
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    • 1978
  • 신경섬유는몸체 안에서 정보의 전달을 액숀 포텐셜(action potential) 형태의 신호(signal)에 의해 수행하고 있다. 우리 몸체에서 두뇌의 지령을 받아 어떠한 동작을 근육에 신경을 통하여 전달하는 것을 생각할 때 두뇌는 정보의 원천(source)으로서, 근육과의 신경접점은 리시버(receiver)로서, 신경섬유는 전화선으로서 간주될 수 있다. 그리고 몸체·안에서의 정보의 전달의 원리는 통신공학이론에 의하여 설명되어 질 수 있다. 저자는 생리학에 깊은 지식이 없어 전자공학분야에 종사 하시는 분들을 위해 이 재미있는 생물학적 현상을 설명할 수 있는 신경조직의 구조(mechanism)와 수학적 모델을 소개하고자 한다. 저자는 독자가 신경조직의 구조의 이해를 위해 액숀 포텐셜(action potential)의 구조를 소개하고 수학적 모델를 위해서는 호지킨-헉슬리 방정식 (Hodgkin-Huxley equation)과 케이불 방정식 (cable equation)을 설명하려고 한다.

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