• Title/Summary/Keyword: 로직

Search Result 1,150, Processing Time 0.023 seconds

Evaluation of the Navigational Risk Level in Coastal Waterway using Fuzzy Logic (퍼지로직을 이용한 연안해역의 통항 위험성 평가)

  • Keum Jong-Soo;Jang Woon-Jae
    • Journal of the Korean Society of Marine Environment & Safety
    • /
    • v.12 no.1 s.24
    • /
    • pp.53-59
    • /
    • 2006
  • The prevention of marine accidents has been a major topic in marine society and various policies and countermeasures have been developed, applied to the industries. The coastal VTS and navigational aids are considered a, one of the effective methods to promote marine safety but they need relatively huge amount of budgets to build. Thus prior to establishing these coastal VTS and navigational aids, it should be evaluated the navigational risk level in the coastal waterways from the Environmental Stress. So far as human beings are concerned, there are many types of fuzziness in the evaluation of navigational safety level. In order to reflect these fuzziness on this evaluation, this paper introduces the fuzzy integral suggested by Choquet to represent the fuzziness in the evaluation process. This paper aims to develop the method for this evaluation from the viewpoint of mariner's operational stress using the fuzzy logic and Choquet integral. In this paper, Korean coastal area is divided into 8 sectors and evaluated the priority for the needs of coastal VTS and navigational aids.

  • PDF

DTMOS Schmitt Trigger Logic Performance Validation Using Standard CMOS Process for EM Immunity Enhancement (범용 CMOS 공정을 사용한 DTMOS 슈미트 트리거 로직의 구현을 통한 EM Immunity 향상 검증)

  • Park, SangHyeok;Kim, SoYoung
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
    • /
    • v.27 no.10
    • /
    • pp.917-925
    • /
    • 2016
  • Schmitt Trigger logic is a gate level design method to have hysteresis characteristics to improve noise immunity in digital circuits. Dynamic Threshold voltage MOS(DTMOS) Schmitt trigger circuits can improve noise immunity without adding additional transistors but by controlling substrate bias. The performance of DTMOS Schmitt trigger logic has not been verified yet in standard CMOS process through measurement. In this paper, DTMOS Schmitt trigger logic was implemented and verified using Magna $0.18{\mu}m$ MPW process. DTMOS Schmitt trigger buffer, inverter, NAND, NOR and simple digital logic circuits were made for our verification. Hysteresis characteristics, power consumption, and delay were measured and compared with common CMOS logic gates. EM Immunity enhancement was verified through Direct Power Injection(DPI) noise immunity test method. DTMOS Schmitt trigger logics fabricated using CMOS process showed a significantly improved EM Immunity in 10 M~1 GHz frequency range.

Design and Implementation of Multimedia Authoring System using Temporal/Spatial Synchronization Manager (시공간 동기화 관리기를 이용한 멀티미디어 저작 시스템의 설계 및 구현)

  • Yeu, In-Kook;Hwang, Dae-Hoon
    • The Transactions of the Korea Information Processing Society
    • /
    • v.4 no.11
    • /
    • pp.2679-2689
    • /
    • 1997
  • In this paper, a multimedia authoring system using temporal/spatial synchronization manager is designed and implemented to support easy and efficient generation of multimedia title. For this goal, a flowchart-oriented logic generator which represents a title author's design intent into a practical title composition logic without extra translation process, and a logic interpreter which translate and implement the generated title logic, are designed. Furthermore, a temporal/spatial synchronization manager which manages temporal/spatial synchronization information between media data for multimedia representation, is designed. Especially, a temporal specification model and MRL, a formal language for the model, are designed to synchronize the temporal relation between media objects. The MRL represents a complex temporal relation by simple and clear form, and synchronizes efficiently multimedia representation according to the author's intent. A presentation frame editor which makes coincidence between visible size of representation media and attachment point, is implemented for spatial synchronization.

  • PDF

Implementation of Logic Gates Using Organic Thin Film Transistor for Gate Driver of Flexible Organic Light-Emitting Diode Displays (유기 박막 트랜지스터를 이용한 유연한 디스플레이의 게이트 드라이버용 로직 게이트 구현)

  • Cho, Seung-Il;Mizukami, Makoto
    • The Journal of the Korea institute of electronic communication sciences
    • /
    • v.14 no.1
    • /
    • pp.87-96
    • /
    • 2019
  • Flexible organic light-emitting diode (OLED) displays with organic thin-film transistors (OTFTs) backplanes have been studied. A gate driver is required to drive the OLED display. The gate driver is integrated into the panel to reduce the manufacturing cost of the display panel and to simplify the module structure using fabrication methods based on low-temperature, low-cost, and large-area printing processes. In this paper, pseudo complementary metal oxide semiconductor (CMOS) logic gates are implemented using OTFTs for the gate driver integrated in the flexible OLED display. The pseudo CMOS inverter and NAND gates are designed and fabricated on a flexible plastic substrate using inkjet-printed OTFTs and the same process as the display. Moreover, the operation of the logic gates is confirmed by measurement. The measurement results show that the pseudo CMOS inverter can operate at input signal frequencies up to 1 kHz, indicating the possibility of the gate driver being integrated in the flexible OLED display.

Agile Attitude Control of Small Satellite using 5Nm Small CMG (5Nm급 소형 CMG를 이용한 소형위성 고기동 자세제어)

  • Rhee, Seung-Wu;Seo, Hyun-Ho;Yoon, Hyung-Joo
    • Journal of the Korean Society for Aeronautical & Space Sciences
    • /
    • v.46 no.11
    • /
    • pp.952-960
    • /
    • 2018
  • Recently, lots of remote sensing satellite require agility to collect more images within the limited time frame. To satisfy this kind of mission requirement, high torque actuator such as CMG is an essential element. In this study, 5Nm class small CMG developed by KARI is introduced to implement for an agile small satellite design. One of the singularity escape CMG steering law, Designated Direction Escape (DDE) method, which is a sort of modified version of Singular Direction Avoidance (SDA) method is summarized for its application on the numerical simulation of agile attitude control system design result. The performance of DDE method is demonstrated properly by escaping well known elliptic internal singularity successfully. 5Nm class small CMG cluster in a pyramid type as well as a roof type configuration is utilized to perform the numerical simulation and to demonstrate its agility design result for a small satellite. Simulation result shows the properness of 5Nm small CMG to a small agile satellite system. Also, the simulation result provides some valuable information that is important to CMG hardware design and manufacturing.

Research of Small Gas Turbine Engine Control Logic by Engine Failure Mode Simulation (소형 가스터빈엔진 고장모드 모사를 통한 제어로직 연구)

  • Lee, Kyungjae;Kim, Sunguk;Back, Kyeungmi;Rhee, Dongho;Kang, Young Seok;Kho, Sunghee
    • Journal of the Korean Society of Propulsion Engineers
    • /
    • v.25 no.2
    • /
    • pp.88-97
    • /
    • 2021
  • The controller of the gas turbine engine is a component that needs to be developed for the development of the gas turbine engine because it is impossible to get the technology transferred from the engine manufacturer due to the import and export regulation. As a part of the engine control logic research, the Korea Aerospace Research Institute conducted a failure diagnostic research using a small gas turbine engine. Before simulating the engine fault, the ground test was performed to analyze normal behavior and performance of engine. Afterwards, the control logic analysis test equipment was established to simulate various engine fault. It is intended to provide background knowledge to engine control logic research for various engine failure conditions.

Fuzzy Logic-based Bit Compression Method for Distributed Face Recognition (분산 얼굴인식을 위한 퍼지로직 기반 비트 압축법)

  • Kim, Tae-Young;Noh, Chang-Hyeon;Lee, Jong-Sik
    • Journal of the Korea Society for Simulation
    • /
    • v.18 no.2
    • /
    • pp.9-17
    • /
    • 2009
  • A face database has contained a large amount of facial information data since face recognition was widely used. With the increase of facial information data, the face recognition based on distributed processing method has been noticed as a major topic. In existing studies, there were lack of discussion about the transferring method for large data. So, we proposed a fuzzy logic-based bit compression rate selection method for distributed face recognition. The proposed method selects an effective bit compression rate by fuzzy inference based on face recognition rate, processing time for recognition, and transferred bit length. And, we compared the facial recognition rate and the recognition time of the proposed method to those of facial information data with no compression and fixed bit compression rates. Experimental results demonstrates that the proposed method can reduce processing time for face recognition with a reasonable recognition rate.

Implementation of a Fuzzy PI+PD Controller for DC Servo Systems (직류 서보시스템 제어용 퍼지 PI+PD 제어기 로직회로 구현)

  • Hong, Soon-Ill;Hong, Jeng-Pyo;Jung, Sung-Hwan
    • Journal of Advanced Marine Engineering and Technology
    • /
    • v.33 no.8
    • /
    • pp.1246-1253
    • /
    • 2009
  • This paper presents derived a calculating form of fuzzy inference, based on decomposition of $\alpha$-level sets. Based on the calculating form it is propose that fuzzy logic circuits of PI+PD controller are a body from fuzzy inference to defuzzificaion in cases where the command variable u directly is generated PWM. The effect of quantization on $\alpha$-levels is investigated. with input/out characteristics of fuzzy controller by simulation. It is concluded that 4 quantization levels are sufficient result for fuzzy control performance of DC servo system. Simulation and experimental results demonstrated that the hardware implementation of the proposed controller can successfully provide good performance on the position control of DC servo system.

A Study on Torque Optimization of Planar Redundant Manipulator using A GA-Tuned Fuzzy Logic Controller (유전자 알고리즘으로 조정된 퍼지 로직 제어기를 이용한 평면 여자유도 매니퓰레이터의 토크 최적화에 관한 연구)

  • Yoo, Bong-Soo;Kim, Seong-Gon;Joh, Joong-Seon
    • Journal of the Korean Institute of Intelligent Systems
    • /
    • v.18 no.5
    • /
    • pp.642-648
    • /
    • 2008
  • A lot of researches on the redundant manipulators have been focused mainly on the minimization of joint torques. However, it is well-known that the most dynamic control algorithms using local joint torque minimization cause huge torques which can not be implemented by practical motor drivers. A new control algorithm which reduces considerably such a huge-required-torque problem is proposed in this paper. It adapts fuzzy logic and genetic algorithm to the conventional local joint torque minimization algorithm. The proposed algorithm is applied to a 3-DOF redundant planar robot. Simulation results show that the proposed algorithm works well.

A Design of the Application Program Generator based on Meta-Data (메타데이터 기반 응용프로그램 생성기 설계)

  • Kim Chi Su;Oh Eun Jin
    • The KIPS Transactions:PartD
    • /
    • v.11D no.7 s.96
    • /
    • pp.1477-1482
    • /
    • 2004
  • Software development process consists of five phases : requirement, analysis, design, implementation and testing. There is almost always a gap between the system design and implementation stages, caused by a combination of the difficulty of programming and frequent changes on the system design. The goal of this paper is to reduce the gap between system design and implementation, and we design a tool producing a application program by recognizing business logic for a more rapid and flexible developing of software. The core idea of Application Program Generator is : firstly, to recognize that business application in the same domain share business logic and presentation logic : secondly, to treat system design as persistent meta-data ; thirdly, to use the persistent meta-data to build or customize applications as required.