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An Algorithm for Efficient use of Label Space over MPLS Network with Multiple Disconnent Timers (MPLS 망에서 복수 연결해제 타이머를 이용한 레이블 공간의 효율적 사용방법)

  • Lee, Sun-Woo;Byun, Tae-Young;Han, Ki-Jun;Jeong, Youn-Kwae
    • Journal of KIISE:Information Networking
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    • v.29 no.1
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    • pp.24-30
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    • 2002
  • Label switching technology is currently emerging as a solution for the rapidly growing of Internet traffic demand. Multiprotocol label switching(MPLS) is one of the standards made by the Internet Engineering Task Force(IETE) intended to enhance speed, scalability, and inter-opearability between label switching technologies. In MPLS, utilization of label space is a very important factor of network performance because labels are basic unit in packet switching. We propose a algorithm to effectively use label space by a multiple disconnect timer at the label switching router. Our algorithm is based on multiple utilization of the connection release timer over the MPLS network with multiple domains. In our algorithm, a relatively linger timeout interval is assigned to the traffic with higher class by the aid of the packet classifier. This reduces delay for making a new connection and also reduces the amount of packets which will be routed to the layer 3. Simulation results shows that reduction of required label number in MPLS network and this indicate our algorithm offers better performance than the existing ones in term of utilization of label space.

A Method for Reducing Path Recovery Overhead of Clustering-based, Cognitive Radio Ad Hoc Routing Protocol (클러스터링 기반 인지 무선 애드혹 라우팅 프로토콜의 경로 복구 오버헤드 감소 기법)

  • Jang, Jin-kyung;Lim, Ji-hun;Kim, Do-Hyung;Ko, Young-Bae;Kim, Joung-Sik;Seo, Myung-hwan
    • Journal of IKEEE
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    • v.23 no.1
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    • pp.280-288
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    • 2019
  • In the CR-enabled MANET, routing paths can be easily destroyed due to node mobility and channel unavailability (due to the emergence of the PU of a channel), resulting in significant overhead to maintain/recover the routing path. In this paper, network caching is actively used for route maintenance, taking into account the properties of the CR. In the proposed scheme, even if a node detects that a path becomes unavailable, it does not generate control messages to establish an alternative path. Instead, the node stores the packets in its local cache and 1) waits for a certain amount of time for the PU to disappear; 2) waits for a little longer while overhearing messages from other flow; 3) after that, the node applies local route recovery process or delay tolerant forwarding strategy. According to the simulation study using the OPNET simulator, it is shown that the proposed scheme successfully reduces the amount of control messages for path recovery and the service latency for the time-sensitive traffic by 13.8% and 45.4%, respectively, compared to the existing scheme. Nevertheless, the delivery ratio of the time-insensitive traffic is improved 14.5% in the proposed scheme.

EC-RPL to Enhance Node Connectivity in Low-Power and Lossy Networks (저전력 손실 네트워크에서 노드 연결성 향상을 위한 EC-RPL)

  • Jeadam, Jung;Seokwon, Hong;Youngsoo, Kim;Seong-eun, Yoo
    • Journal of Korea Society of Industrial Information Systems
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    • v.27 no.6
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    • pp.41-49
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    • 2022
  • The Internet Engineering Task Force (IETF) has standardized RPL (IPv6 Routing Protocol for Low-power Lossy Network) as a routing protocol for Low Power and Lossy Networks (LLNs), a low power loss network environment. RPL creates a route through an Objective Function (OF) suitable for the service required by LLNs and builds a Destination Oriented Directed Acyclic Graph (DODAG). Existing studies check the residual energy of each node and select a parent with the highest residual energy to build a DODAG, but the energy exhaustion of the parent can not avoid the network disconnection of the children nodes. Therefore, this paper proposes EC-RPL (Enhanced Connectivity-RPL), in which ta node leaves DODAG in advance when the remaining energy of the node falls below the specified energy threshold. The proposed protocol is implemented in Contiki, an open-source IoT operating system, and its performance is evaluated in Cooja simulator, and the number of control messages is compared using Foren6. Experimental results show that EC-RPL has 6.9% lower latency and 5.8% fewer control messages than the existing RPL, and the packet delivery rate is 1.7% higher.

Performance Analysis of DoS/DDoS Attack Detection Algorithms using Different False Alarm Rates (False Alarm Rate 변화에 따른 DoS/DDoS 탐지 알고리즘의 성능 분석)

  • Jang, Beom-Soo;Lee, Joo-Young;Jung, Jae-Il
    • Journal of the Korea Society for Simulation
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    • v.19 no.4
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    • pp.139-149
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    • 2010
  • Internet was designed for network scalability and best-effort service which makes all hosts connected to Internet to be vulnerable against attack. Many papers have been proposed about attack detection algorithms against the attack using IP spoofing and DoS/DDoS attack. Purpose of DoS/DDoS attack is achieved in short period after the attack begins. Therefore, DoS/DDoS attack should be detected as soon as possible. Attack detection algorithms using false alarm rates consist of the false negative rate and the false positive rate. Moreover, they are important metrics to evaluate the attack detections. In this paper, we analyze the performance of the attack detection algorithms using the impact of false negative rate and false positive rate variation to the normal traffic and the attack traffic by simulations. As the result of this, we find that the number of passed attack packets is in the proportion to the false negative rate and the number of passed normal packets is in the inverse proportion to the false positive rate. We also analyze the limits of attack detection due to the relation between the false negative rate and the false positive rate. Finally, we propose a solution to minimize the limits of attack detection algorithms by defining the network state using the ratio between the number of packets classified as attack packets and the number of packets classified as normal packets. We find the performance of attack detection algorithm is improved by passing the packets classified as attacks.

Development of Neural Network Based Cycle Length Design Model Minimizing Delay for Traffic Responsive Control (실시간 신호제어를 위한 신경망 적용 지체최소화 주기길이 설계모형 개발)

  • Lee, Jung-Youn;Kim, Jin-Tae;Chang, Myung-Soon
    • Journal of Korean Society of Transportation
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    • v.22 no.3 s.74
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    • pp.145-157
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    • 2004
  • The cycle length design model of the Korean traffic responsive signal control systems is devised to vary a cycle length as a response to changes in traffic demand in real time by utilizing parameters specified by a system operator and such field information as degrees of saturation of through phases. Since no explicit guideline is provided to a system operator, the system tends to include ambiguity in terms of the system optimization. In addition, the cycle lengths produced by the existing model have yet been verified if they are comparable to the ones minimizing delay. This paper presents the studies conducted (1) to find shortcomings embedded in the existing model by comparing the cycle lengths produced by the model against the ones minimizing delay and (2) to propose a new direction to design a cycle length minimizing delay and excluding such operator oriented parameters. It was found from the study that the cycle lengths from the existing model fail to minimize delay and promote intersection operational conditions to be unsatisfied when traffic volume is low, due to the feature of the changed target operational volume-to-capacity ratio embedded in the model. The 64 different neural network based cycle length design models were developed based on simulation data surrogating field data. The CORSIM optimal cycle lengths minimizing delay were found through the COST software developed for the study. COST searches for the CORSIM optimal cycle length minimizing delay with a heuristic searching method, a hybrid genetic algorithm. Among 64 models, the best one producing cycle lengths close enough to the optimal was selected through statistical tests. It was found from the verification test that the best model designs a cycle length as similar pattern to the ones minimizing delay. The cycle lengths from the proposed model are comparable to the ones from TRANSYT-7F.