• Title/Summary/Keyword: 디지털 서명 알고리듬

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확인서 이용 부가형 디지탈서명 방식 표준(안)

  • 임채훈;이필중;강신각;박성준
    • Proceedings of the Korea Institutes of Information Security and Cryptology Conference
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    • 1997.11a
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    • pp.251-264
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    • 1997
  • 정보화 사회에서 거의 모든 거래는 통신망을 통해 이루어지고, 이에 따라 통신망 상에서의 정보보호가 중요한 과제로 부각되고 있다. 이러한 통신망 상의 정보보호를 위해 필수적인 암호학적 도구가 디지털서명이며, 국내에서도 고유의 디지탈서명 알고리듬을 표준화하려는 노력이 경주되어 왔다. 본 논문에서는 우리나라의 디지탈서명 표준안으로 상정된 디지탈서명 알고리듬 및 관련 시스템 변수의 선정 방법들을 기술한다. 또한 서명 표준안의 안전성, 효율성 등을 분석해 보고, 실제 구현결과도 제시한다.

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Design and FPGA Implementation of a High-Speed RSA Algorithm for Digital Signature (디지털 서명을 위한 고속 RSA 암호 시스템의 설계 및 FPGA 구현)

  • 강민섭;김동욱
    • The KIPS Transactions:PartC
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    • v.8C no.1
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    • pp.32-40
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    • 2001
  • In this paper, we propose a high-speed modular multiplication algorithm which revises conventional Montgomery's algorithm. A hardware architecture is also presented to implement 1024-bit RSA cryptosystem for digital signature based on the proposed algorithm. Each iteration in our approach requires only one addition operation for two n-bit integers, while that in Montgomery's requires two addition operations for three n-bit integers. The system which is modelled in VHDL(VHSIC Hardware Description Language) is simulated in functionally through the use of $Synopsys^{TM}$ tools on a Axil-320 workstation, where Altera 10K libraries are used for logic synthesis. For FPGA implementation, timing simulation is also performed through the use of Altera MAX + PLUS II. Experimental results show that the proposed RSA cryptosystem has distinctive features that not only computation speed is faster but also hardware area is drastically reduced compared to conventional approach.

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Integrity Guarantee Scheme of Mobile Agents through Authentication of Digital Signature with TTS (TTS기반에서 디지털 서명의 실행 인증을 통한 에이전트의 무결성 보장 기법)

  • Jung Chang-Ryul;Yoon Hong-Sang
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.31 no.6C
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    • pp.651-657
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    • 2006
  • This paper propose the technique for the execution authentication of digital signature with TTS(traceable trust server) to guarantee the safe execution of mobile agents. That is to say, it is focused on improving the processing speed of systems and the traffic of network which are problems in the existing studies. The digital signature is used to guarantee the efficient and safe execution and the integrity of mobile agents. The certificate of it is chained with synthesis function, cryptographic algorithm based on public key, and hash function. And white hosts can be protected against the threat of being used maliciously. Then, we prove the efficiency of system overhead and the traffic of network by the analysis. In case the certificate chain of a digital signature is used, the safe execution of mobile agents can be protected against attackers that wish to insert a newly created certificate after cutting off the chain after striking space key 2 times.

A High-Performance ECC Processor Supporting NIST P-521 Elliptic Curve (NIST P-521 타원곡선을 지원하는 고성능 ECC 프로세서)

  • Yang, Hyeon-Jun;Shin, Kyung-Wook
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.26 no.4
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    • pp.548-555
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    • 2022
  • This paper describes the hardware implementation of elliptic curve cryptography (ECC) used as a core operation in elliptic curve digital signature algorithm (ECDSA). The ECC processor supports eight operation modes (four point operations, four modular operations) on the NIST P-521 curve. In order to minimize computation complexity required for point scalar multiplication (PSM), the radix-4 Booth encoding scheme and modified Jacobian coordinate system were adopted, which was based on the complexity analysis for five PSM algorithms and four different coordinate systems. Modular multiplication was implemented using a modified 3-Way Toom-Cook multiplication and a modified fast reduction algorithm. The ECC processor was implemented on xczu7ev FPGA device to verify hardware operation. Hardware resources of 101,921 LUTs, 18,357 flip-flops and 101 DSP blocks were used, and it was evaluated that about 370 PSM operations per second were achieved at a maximum operation clock frequency of 45 MHz.

Implementation of ElGamal Cryptosystem and Schnorr Digital Signature Scheme on Elliptic Curves (타원 곡선위에서의 ElGamal 암호기법과 Schnorr 디지털 서명 기법의 구현)

  • 이은정;최영주
    • Proceedings of the Korea Institutes of Information Security and Cryptology Conference
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    • 1994.11a
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    • pp.166-179
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    • 1994
  • Diffie-Hellman 의 공개 키 암호 프로토콜이 제안된 이후 이산 대수 문제의 어려움이 프로토콜의 안전도와 깊이 연관되었다. 유한체를 이용한 암호 기법을 ElGamal 이 세웠으나, Index-Calculus 알고리듬에 의해 유한체위 에서 이산 대수 문제가 subexponential 알고리듬이되 어 ElGamal 기법의 안전도가 약해졌다. Nonsupersingular타원 곡선을 선택하여 유한체대신 ElGamal 암호 기법에 적용하면 안전한 암호 시스템을 설계할 수 있다. 이 논문에서는 콤퓨터 구현시 용이한 nonsupersingular 타원 곡선을 선택하는 방법, 유한체위에서의 연산, 평문을 타원 곡선의 원소로 임베드(Imbedding) 하는 방법 등 타원 곡선을 암호시스템에 적응하기 어려운 점들에 대한 해결 방법을 소개하고, 실제로 콤퓨터로 구현하여 그 실행 결과와 ElGamal 기법을 개선한 Schnorr 기법을 실행한 결과를 밝혔다.

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EC-DSA Implementation using Security SoC with built-in ECC Core (ECC 코어가 내장된 보안 SoC를 이용한 EC-DSA 구현)

  • Yang, Hyeon-Jun;Shin, Kyung-Wook
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2021.05a
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    • pp.63-65
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    • 2021
  • This paper describes an integrated H/W-S/W implementation of elliptic curve digital signature algorithm (EC-DSA) using a security system-on-chip (SoC). The security SoC uses the Cortex-A53 APU as CPU, and the hardware IPs of high-performance elliptic curve cryptography (HP-ECC) core and SHA3 (secure hash algorithm 3) hash function core are interfaced via AXI4-Lite bus protocol. The signature generation and verification processes of EC-DSA were verified by the implementation of the security SoC on a Zynq UltraScale+ MPSoC device.

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A Security SoC supporting ECC based Public-Key Security Protocols (ECC 기반의 공개키 보안 프로토콜을 지원하는 보안 SoC)

  • Kim, Dong-Seong;Shin, Kyung-Wook
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.24 no.11
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    • pp.1470-1476
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    • 2020
  • This paper describes a design of a lightweight security system-on-chip (SoC) suitable for the implementation of security protocols for IoT and mobile devices. The security SoC using Cortex-M0 as a CPU integrates hardware crypto engines including an elliptic curve cryptography (ECC) core, a SHA3 hash core, an ARIA-AES block cipher core and a true random number generator (TRNG) core. The ECC core was designed to support twenty elliptic curves over both prime field and binary field defined in the SEC2, and was based on a word-based Montgomery multiplier in which the partial product generations/additions and modular reductions are processed in a sub-pipelining manner. The H/W-S/W co-operation for elliptic curve digital signature algorithm (EC-DSA) protocol was demonstrated by implementing the security SoC on a Cyclone-5 FPGA device. The security SoC, synthesized with a 65-nm CMOS cell library, occupies 193,312 gate equivalents (GEs) and 84 kbytes of RAM.

A Security Module for Vehicle Network Communication (차량 네트워크 통신용 보안 모듈)

  • Kwon, Byeong-Heon;Park, Jin-Sung
    • Journal of Digital Contents Society
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    • v.8 no.3
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    • pp.371-376
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    • 2007
  • Many modules such as controller, sensor, telematics terminal, navigation, audio and video are connected each other via vehicle network (CAN, MOST, etc). Futhermore, users can have ITS or internet services in moving by connecting to wireless mobile network. These network capabilities can cause a lots of security issues such as data hacking, privacy violation, location tracking and so on. Some possibilities which raise a breakdown or accident by hacking vehicle operation data (sensor, control data) are on the increase. In this paper, we propose a security module which has encryption functionalities and can be used for vehicle network system such as CAN, MOST, etc. This security module can provide conventional encryption algorithms and digital signature processing functionality such as DES, 3-DES, SEED, ECC, and RSA.

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A Security SoC embedded with ECDSA Hardware Accelerator (ECDSA 하드웨어 가속기가 내장된 보안 SoC)

  • Jeong, Young-Su;Kim, Min-Ju;Shin, Kyung-Wook
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.26 no.7
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    • pp.1071-1077
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    • 2022
  • A security SoC that can be used to implement elliptic curve cryptography (ECC) based public-key infrastructures was designed. The security SoC has an architecture in which a hardware accelerator for the elliptic curve digital signature algorithm (ECDSA) is interfaced with the Cortex-A53 CPU using the AXI4-Lite bus. The ECDSA hardware accelerator, which consists of a high-performance ECC processor, a SHA3 hash core, a true random number generator (TRNG), a modular multiplier, BRAM, and control FSM, was designed to perform the high-performance computation of ECDSA signature generation and signature verification with minimal CPU control. The security SoC was implemented in the Zynq UltraScale+ MPSoC device to perform hardware-software co-verification, and it was evaluated that the ECDSA signature generation or signature verification can be achieved about 1,000 times per second at a clock frequency of 150 MHz. The ECDSA hardware accelerator was implemented using hardware resources of 74,630 LUTs, 23,356 flip-flops, 32kb BRAM, and 36 DSP blocks.