• Title/Summary/Keyword: 디지털 변조방식

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An Improvement on FFT-Based Digital Implementation Algorithm for MC-CDMA Systems (MC-CDMA 시스템을 위한 FFT 기반의 디지털 구현 알고리즘 개선)

  • 김만제;나성주;신요안
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.24 no.7A
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    • pp.1005-1015
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    • 1999
  • This paper is concerned with an improvement on IFFT (inverse fast Fourier transform) and FFT based baseband digital implementation algorithm for BPSK (binary phase shift keying)-modulated MC-CDMA (multicarrier-code division multiple access) systems, that is functionally equivalent to the conventional implementation algorithm, while reducing computational complexity and bandwidth requirement. We also derive an equalizer structure for the proposed implementation algorithm. The proposed algorithm is based on a variant of FFT algorithm that utilizes a N/2-point FFT/IFFT for simultaneous transformation and reconstruction of two N/2-point real signals. The computer simulations under additive white Gaussian noise channels and frequency selective fading channels using equal gain combiner and maximal ratio combiner diversities, demonstrate the performance of the proposed algorithm.

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Digital Chaotic Communication System Based on CDSK Modulation (CDSK 방식의 디지털 카오스 통신 시스템)

  • Bok, Junyeong;Ryu, Heung-Gyoon
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.38A no.6
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    • pp.479-485
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    • 2013
  • Recently, interest for wireless communication technology with improved security and low eavesdropping probability is increasing rapidly recognizing that information security is an important. Chaos signal can be used encode information efficiently due to irregular phenomena. Chaotic signal is very sensitive to the initial condition. Chaos signal is difficult to detect the signal if you do not know the initial conditions. Also, chaotic signal has robustness to multipath interference. In this paper, we evaluate the performance of correlation delay shift keying (CDSK) modulation with different chaotic map such as Tent map, Logistic map, Henon map, and Bernoulli shift map. Also, we analyze the BER performance depending on the selection of spreading factor (SF) in CDSK. Through the theoretical analyses and simulations, it is confirmed that Henon map has better BER performance than the other three chaotic maps when spreading factor is 70.

Studies on Joint Source-Channel Coding in Wireless Environment Using Subband Image Coding and TCM (무선환경에서 부대역 영상부호화와 TCM을 이용한 공동 소스/채널 부호화에 관한 연구)

  • Lee, Jae-Ryun;Sohn, Won
    • Proceedings of the Korean Society of Broadcast Engineers Conference
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    • 2001.11b
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    • pp.109-113
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    • 2001
  • 최근 들어 디지털 이동통신 시스템은 음성 통신 뿐만 아니라 멀티미디어 통신에도 그 적용범위를 확장시키고 있다. 그러나 이러한 시스템에서 한정된 채널 대역폭의 사용은 멀티미디어 정보의 대용량성을 고려할 때, 그 적용범위를 심각하게 축소시키는 가장 큰 제한요소이다. 일반적인 통신 시스템의 소스 부호화기는 채널 잡음을 고려하지 않고 설계되며, 채널 부호화기는 소스 신호의 특성과 무관하게 채널 환경의 극복에만 중점을 두고 설계된다. 그러나 대역폭 제한적인 통신 환경에서 보다 효율적인 대역폭 사용을 위해서는 채널 환경에 따라 소스 부호율과 채널 부호율을 가변적으로 운용하여야 한다. 본 논문에서는 영상을 부대역 부호화하여 각 부대역 영상이 원래의 영상 재구성에 기여하는 중요도에 따라 한정된 채널 자원을 최적으로 할당하는 공동 소스/채널 부호화(Joint Source-channel Coding)에 관하여 연구하였다. 부대역 영상의 소스 부호화로는 DPCM과 PCM을 사용하였고, 채널 부호화는 TCM 부호화기를 사용하였으며 상이오류보호(Unequal Error Protection)를 위해 3가지 채널 부호율에 따라 각각 TCQPSK, TC8PSK, TC16PSK 변조방식을 사용하였다. 모의실험에 사용된 채널 환경은 랜덤잡음 환경과 이동수신의 경우에 발생하는 Rayleigh 페이딩 환경을 고려하였으며, 각 환경에서의 채널 SNR에 따라 동일오류보호(Equal Error Protection) 시스템과 상이오류보호(Unequal Error Protection) 시스템의 성능을 비교하였다.

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Encryption Algorithm Technique for Device's key Protect in M2M environment (M2M 환경의 디바이스 키 보호를 위한 암호 알고리즘 응용 기법)

  • Choi, Do-Hyeon;Park, Jung-Oh
    • Journal of Digital Convergence
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    • v.13 no.10
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    • pp.343-351
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    • 2015
  • With the diverse services of the current M2M environment being expanded to the organizations, the corporations, and the daily lives, the possibility of the occurrence of the vulnerabilities of the security of the related technologies have become an issue. In order to solve such a problem of the vulnerability of the security, this thesis proposes the technique for applying the cryptography algorithm for the protection of the device key of the M2M environment. The proposed technique was based on the elliptic curve cryptography Through the key exchange and the signature exchange in the beginning, the security session was created. And the white box cipher was applied to the encryption that creates the white box table using the security session key. Application results cipher algorithm, Elliptic Curve Cryptography provides a lightweight mutual authentication, a session key for protecting the communication session and a conventional white-box cipher algorithm and was guaranteed the session key used to encrypt protected in different ways. The proposed protocol has secure advantages against Data modulation and exposure, MITM(Man-in-the-middle attack), Data forgery and Manipulation attack.

A Novel Half-Bridge Resonant Inverter With Load Free-wheeling Modes (부하 환류모드를 갖는 새로운 하프 브리지 공진형 인버터)

  • Yeon Jae-Eul;Cho Kyu-Min;Kim Hee-Jun
    • Journal of the Institute of Electronics Engineers of Korea SC
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    • v.42 no.3 s.303
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    • pp.71-80
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    • 2005
  • This paper proposes a new circuit topology of the half-bridge resonant inverter and presents its digital control scheme. As the proposed half-bridge inverter can be operated in the load-freewheeling modes, pulse width modulation (PWM) control method can be used for the output power control. The proposed half-bridge inverter can keep unity output displacement factor under the load-impedance varying conditions, if a new PWM control scheme based on the resonant frequency tracking algorithm is adopted. In this paper, the operation principle, electrical characteristics and detailed digital control scheme of the proposed half-bridge resonant inverter and loss analysis comparing with a conventional half bridge inverter is described. The experimental results of the proto-type experimental setup to verify the validity of the proposed half-bridge resonant inverter are presented and discussed.

Design of Low-Complexity FSM based on Viterbi for Optimum Bluetooth GFSK Signal Receiver (최적의 Bluetooth GFSK 신호 수신을 위한 Viterbi 기반 저복잡도 FSM 설계)

  • Kwon, Taek-Won;Lee, Kyu-Man
    • Journal of Digital Convergence
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    • v.20 no.1
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    • pp.185-190
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    • 2022
  • Bluetooth is a common wireless technology that is widely used as a connection medium between various consumer electronic devices. The Bluetooth receiver usually adopts a Viterbi algorithm to improve signal-to-noise ratio performance, but requires complex hardware and calculations for continuous search and estimation for the irrational modulation indexes at the transmission. This paper proposes a non-coherent maximum estimation based 8-State Viterbi FSM to solve these complexity problems. The proposed optimal Viterbi FSM can detect Gaussian frequency-shfit keying symbol without any prior information and estimation for the modulation indexes. The HV1/HV2 packets are used for the estimation of the proposed algorithm and the simulation results have shown performance improvements with about 2dB for 10-3 BER compared to other ideal approaches such as decision direct method.

A Study on Design and Performance Evaluation of the Frequency Snthesizer Using the DDS in the Transmitter of the FFH/BFSK System (FFH/BFSK 시스템 송신부에서 DDS를 이용한 주파수합성기 설계 및 성능평가에 관한 연구)

  • 이두석;유형렬;정지원;조형래;김기문
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 1999.11a
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    • pp.161-166
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    • 1999
  • The global trends of mobile communication system is moving toward digitizing, high-speed and large-capacity. Also, to utilize the limited frequency-resource efficiently, spread spectrum system is a mainstream. In this study we are concerning with the fast frequency-hopping system. Instead of the PLL with many problems such as phase-noise, we used the DDS is popular in these days minimizes the disadvantage of PLL. In the case the FFH system is designed using the PLL, it is difficult to be satisfied of the design conditions such as RF badwidth and the settling time of PLL, and it has limitation because of complex circuit by using the balanced modulator. In this study, we evaluated the performance in order to design the FFH system using the DDS. The system that has the improvement of error rate, 1Mhps hopping rate and 5MHz RF bandwidth is designed and evaluated.

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Design and Comparison of Digital Predistorters for High Power Amplifiers (비선형 고전력 증폭기의 디지털 전치 보상기 설계 및 비교)

  • Lim, Sun-Min;Eun, Chang-Soo
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.34 no.4C
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    • pp.403-413
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    • 2009
  • We compare three predistortion methods to prevent signal distortion and spectral re-growth due to the high PAPR (peak-to-average ratio) of OFDM signal and the non-linearity of high-power amplifiers. The three predistortion methods are pth order inverse, indirect learning architecture and look up table. The pth order inverse and indirect learning architecture methods requires less memory and has a fast convergence because these methods use a polynomial model that has a small number of coefficients. Nevertheless the convergence is fast due to the small number of coefficients and the simple computation that excludes manipulation of complex numbers by separate compensation for the magnitude and phase. The look up table method is easy to implement due to simple computation but has the disadvantage that large memory is required. Computer simulation result reveals that indirect learning architecture shows the best performance though the gain is less than 1 dB at $BER\;=\;10^{-4}$ for 64-QAM. The three predistorters are adaptive to the amplifier aging and environmental changes, and can be selected to the requirements for implementation.

A SCPWL Model-Based Digital Predistorter for Nonlinear High Power Amplifier Linearization (비선형 고출력 증폭기의 선형화를 위한 SCPWL 모텔 기반의 디지털 사전왜곡기)

  • Seo, Man-Jung;Jeon, Seok-Hun;Im, Sung-Bin
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.47 no.10
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    • pp.8-16
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    • 2010
  • An orthogonal frequency division multiplexing (OFDM) system is a special case of multicarrier transmission, where a single data stream is transmitted over a number of lower-rate subcarriers. One of the main reasons to use OFDM is to increase robustness against frequency-selective fading or narrowband interference. However, in the radio systems the distortion introduced by high power amplifiers (HPA's) such as traveling wave tube amplifier (TWTA) considered in this paper, is also critical. Since the signal amplitude of the OFDM system is Rayleigh-distributed, the performance of the OFDM system is significantly degraded by the nonlinearity of the HPA in the OFDM transmitter. In this paper, we propose a simplicial canonical piecewise-linear (SCPWL) model based digital predistorter to compensate for nonlinear distortion introduced by an HPA in an OFDM system. Computer simulation is carried on an OFDM system under additive white Gaussian noise (AWGN) channels with 16-QAM and 64-QAM modulation schemes and modulator/demodulator implemented with 1024-point FFT/IFFT. The simulation results demonstrate that the proposed predistorter achieves significant performance improvement by effectively compensating for the nonlinearity introduced by the HPA.

Efficient Frame Synchronization Detector and Low Complexity Automatic Gain Controller for DVB-S2 (효율적인 디지털 위성 방송 프레임 동기 검출 회로 및 낮은 복잡도의 자동 이득 제어 회로)

  • Choi, Jin-Kyu;Sunwoo, Myung-Hoon;Kim, Pan-Soo;Chang, Dae-Ig
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.46 no.2
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    • pp.31-37
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    • 2009
  • This paper presents an efficient frame synchronization strategy with the identification of modulation type for Digital Video Broadcasting-Satellite second generation (DVB-S2). To detect the Start Of Frame (SOF) and identify a modulation mode at low SNR, we propose a new correlator structure and a low complexity Automatic Gain Controller (AGC). The proposed frame synchronization architecture can reduce about 93% multipliers and 89% adders compared with the direct implementation of the Differential - Generalized Post Detection Integration (D-GPDI) algorithm which is very complex and the proposed a low complexity AGC consists of only 5 multipliers and 3 adders. The proposed architecture has been thoroughly verified on the Xilinx Virtex II FPGA board.