• 제목/요약/키워드: 디지털 계전기

검색결과 91건 처리시간 0.028초

DSP TMS320C32를 이용한 디지털 계전기 시험을 위한 시뮬레이터 (Simulator by use of DSP TMS320C32 for Digital Relay Test)

  • 박철원;안태풍;고인석;신명철
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2004년도 학술대회 논문집 전문대학교육위원
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    • pp.120-122
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    • 2004
  • This paper describes the digital relay simulator by use of DSP for digital relay test. The simulator software has EMTP simulation data file conversion. user define simulation data generation. data analysis engine. etc. The simulator hardware design uses 32bit floating point DSP architecture to achivev flexibility and high speed operation.

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저압 배전계통의 고조파 현황 분석 (Measurement of Harmonic Level in Low-Voltage System)

  • 강문호;송양회;이흥호
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2008년도 제39회 하계학술대회
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    • pp.386-387
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    • 2008
  • 정보통신기술과 디지털기술의 발전으로 수용가의 설비의 전기적인 내성은 낮아지고 있는 반면 배전계통의 외란은 증가하고 있다. 특히 고조파는 변압기 등 기기의 수명저하와 원판형계전기 오동작 등의 원인이 되고 있어 배전계통의 고조파 현황분석은 매우 중요한 의미를 갖는다. 한국전력공사에서는 연구과제의 수행을 통해 2006년부터 1년간 저압 배전계통의 고조파 현황을 측정하고 이를 분석하였다. 측정개소는 기준임피던스의 기준이 되는 저압측 전력량계 1차측으로 하고 전국 100 개소를 부하특성에 따라 선정하였다. 1년간 측정한 고조파를 차수별로 분석한 결과 영상분에 해당하는 9차와 15차 고조파가 IEC61000-3-6의 저압계통 고조파 기준과 비교하여 높게 나타났다.

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직류급전시스템 시험적용 사례를 통한 디지털 직류 보호계전기에 관한 연구 (A Study on the Digital DC Protection Relay through with Field Adoption Test in the DC Distribution System)

  • 고인석;차광석;민병훈
    • 대한전기학회논문지:전기기기및에너지변환시스템부문B
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    • 제55권12호
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    • pp.646-652
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    • 2006
  • This study identifies the comparison of Technical specification and Characteristics of DC Protection Relay(ETCPU200) used in DC Distribution System in Korea. ETCPU200 has completed Field Test and approved its capability by finding out causes of recent operations through lately developed digital DC protection relay in parallel operation at Maebong-Substation, Sangbong-Substation, Nakseongdae-Substation, Euljirosaga-Substation, Jegi-Substation and Chongyangri T/P area. It also examines additional features for efficient System Analysis and Operations.

PC 인터페이스에 의한 디지털 보호 계전기의 성능 시험기 (A PC based, Low Cost, Tester for Digital Protective Relay)

  • 박철원;서종완;정호성;신명철;이복구
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1999년도 추계학술대회 논문집 학회본부 A
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    • pp.306-308
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    • 1999
  • Recently, several developments of real-time simulators have been reported. But they are very high cost. And then they are difficult to apply for relay testing in small business. This paper presents the structure and performance of a new pc based, low cost, tester to digital protection relays. Fault transients are generated either by simulating signals using EMTP or by recorded fault signals.

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디지털 보호 계전기를 이용한 모터 보호 및 제어 (Motor Protection and Control with Digital Protective Relays)

  • 이성환;안인석
    • 제어로봇시스템학회:학술대회논문집
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    • 제어로봇시스템학회 2000년도 제15차 학술회의논문집
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    • pp.178-178
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    • 2000
  • In this paper, intelligent methods using digital protection relay in power management and control system is developed in order to protect power systems by means of timely fault detection during operation and control at starting for induction motor which have various load environments and capacities in power systems. The digital protective relay was designed with DSP CPU(TMS320C31) to Protect and measure more quickly and precisely. The test result on the basis of KEMCl120 and IEC60255, show that the operation time error of the digital motor protection relay is improved within $\pm$5%. Also, we can control motors at starting according to starting types with simple method as programmable sequence editor. So we can improve the demerits of high cost and much manhour for rework.

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디지털 계전기를 이용한 전력감시 및 분산제어 (Power Monitoring and Distributed Control by Digital Relay)

  • 이성환;박상배;안인석
    • 한국산업융합학회 논문집
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    • 제4권3호
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    • pp.263-266
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    • 2001
  • In this paper, intelligent methods using digital protection relay in power SCADA system is developed in order to protect power systems by means of timely fault detection during operation and control at starting for induction motor which have various load environments and capacities in power systems. The digital protective relay was designed with DSP CPU(TMS320C31) to protect and measure more quickly and precisely. The test result on the basis of KEMC 1120 and IEC60255, show that the operation time error of the digital motor protection relay is improved within ${\pm}5%$. Also, we can control motors at starting according to starting types with simple method as programmable sequence editor. So we can improve the demerits of high cost and much manhour for rework.

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디지털 보호계전기의 시험을 위한 시뮬레이터에 관한 연구 (A Study on Simulator for Testing of Digital Protective Relay)

  • 박철원;신명철;안태풍
    • 전기학회논문지P
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    • 제55권4호
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    • pp.183-189
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    • 2006
  • In this work, the digital simulator for testing of digital protective relay is presented. The proposed simulator software has EMTP simulation data file conversion, sequence waveform generation, user define simulation data generation, communication engine, data analysis engine and measurements function etc. The simulator hardware is designed using 32bit floating point DSP architecture to achieve flexibility and high speed operation. This simulator is tested to evaluate the performance of relay simulator by using a output data of simulation model on EMTP.

모선보호용 디지털계전기의 고장분석 프로그램의 구현 (A Fault Analysis Program for a Digital Bus Protection Relay)

  • 손천명;강상희;이승재;안용진
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2001년도 추계학술대회 논문집 전력기술부문
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    • pp.246-248
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    • 2001
  • In this paper, the fault analysis program that is convenient to analyse fault records of a digital relay and to set a digital relay is described. The key feature of this fault analysis program is as follows. - analysing fault records stored in a local PC and/or a digital relay - analysing events - setting a digital relay. This program is for a digital bus protection relay using a conventional variable percentage current differential relaying algorithm. So this program adds a function analysing the characteristic of each variable percentage current differential function and the connection state of the transmission lines at double-bus system.

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대규모 전력계통의 실시간 해석 및 응용 (Real-time Analysis of Large Scale Power Systems Using KEPS)

  • 신정훈;김태균;윤용범;추진부
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2001년도 하계학술대회 논문집 A
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    • pp.101-105
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    • 2001
  • 본 논문에서는 한전 전력연구원에서 개발한 전력계통 해석용 시뮬레이터(이하 KEPS)를 이용하여 대규모 전력계통을 실시간으로 해석하는 방법 및 그 결과를 제시하고자 한다. KEPS는 캐나다 RTI사에서 개발한 RTDS(Real-Time Digital Simulator)를 근간으로 하는 대규모 디지털 실시간 시뮬레이터로써 총 26랙으로 구성되어 있으며 대규모 전력계통을 $50{\mu}sec{\sim}70{\mu}sec$의 타임스텝으로 계산할 수 있는 전력계통 전자기 과도현상 모의해석 장치이다. 본 논문에서는 KEPS를 이용하여 한전의 2000년 계통을 실시간으로 해석하고, 전력계통 안정화장치 (PSS), 계전기등 외부기기를 실시간으로 해석, 검증한 결과를 소개하기로 한다.

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DSP를 이용한 디지털 보호 계전기의 시뮬레이터에 관한 연구 (A Study on Development of Digital Protective Relay Simulator using Digital Signal Processor)

  • 이종주;정호성;박철원;신명철;안태풍;고인석
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2001년도 하계학술대회 논문집 A
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    • pp.237-239
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    • 2001
  • This paper describes the digital relay simulator system using digital signal processor. The simulator system has two parts, one is software and the other is hardware part. The simulation software has variety calculation engines ; EMTP simulation data file conversion, user define simulation data generation, sequence data generation, data analysis engines. etc, these are designed upon GUI. And simulator software provides easy control interface for users, the simulator software performs on every MS Windows OS. The simulator hardware design uses 32bit floating point DSP(TMS320C32) architecture to achieve flexibility and high speed operation.

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