• Journal of IKEEE
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• v.19 no.1
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• pp.87-93
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• 2015

In this paper, a $145{\mu}W$, 87dB SNR, Low power 3rd order Sigma-Delta Modulator with Op-amp sharing is proposed. Conventional architecture with analog path and digital path is improved by adding a delayed feed -forward path for disadvantages that coefficient value of the first integrator is small. Proposed architecture has a larger coefficient value of the first integrator to remove the digital path. Power consumption of proposed architecture using op-amp sharing is lower than conventional architecture. Simulation results for the proposed SDM designed in $0.18{\mu}m$ CMOS technology with power supply voltage 1.8V, signal bandwidth 20KHz and sampling frequency 2.8224MHz shows SNR(Signal to Noise Ratio) of 87dB, the power consumption of $145{\mu}W$.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.44 no.1
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• pp.1-9
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• 2007

Digital Multimedia Broadcasting is the next generation broadcasting service which enables various digital multimedia contents, i.e., audio and video, and data access for mobile users. However, due to the bandwidth limitation, the spatial resolution is limited to CIF(Common Interleaved Frame). The Advanced Terrestrial DMB (AT-DMB) secures additional bandwidth by adopting hierarchical modulation transmission technology and provides high data rate and quality for mobile multimedia broadcasting services with scalable video coding(SVC). This paper proposes scalable video coding technology for AT-DMB which enables high quality mobile multimedia broadcasting services that exceeds current DMB service's quality and contents capability.

• The KIPS Transactions:PartB
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• v.12B no.4 s.100
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• pp.443-450
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• 2005

Digital fingerprinting is a contents-protection technique, where customer information is inserted into digital contents. Fingerprinted contents undergo various attacks. Especially, attackers can remove easily the inserted fingerprint by collusion attacks, because digital fingerprinting inserts slightly different codes according to the customers. Among collusion attacks, averaging attack is a simple, fast, and efficient attack. In this paper, we propose a video fingerprinting system that is robust to the averaging attack. In order to achieve code efficiency and robustness against the averaging attack, we adopt anti-collusion code (fingerprint code) from GD-PBIBD theory. When the number of users is increased, the size of fingerprint code also grows. Thus, this paper addresses a zero-based code modulation technique to embed and detect this fingerprint code efficiently. We implemented a blind video fingerprinting system based on our proposed technique and performed experiments on various colluding cases. Based on the results, we could detect most of colluders. In the worst case, our scheme could trace at least one colluder successfully.

• The Journal of the Korea Contents Association
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• v.5 no.1
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• pp.55-63
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• 2005

In undeniable digital signature scheme, the signature can not be verified without the signer's cooperation. The undeniable signature scheme can be used to computerize many applications which can not be done by a conventional digital signature scheme. In this study, we propose the undeniable digital multi-signature scheme which requires many signers and designated verifier The multi-signature can be verified only in cooperation with all signers. The proposed scheme satisfies undeniable property and it is secure against active attacks such as modification and denial of the multi-signature by signers. We also propose copyright protection method of co-authored digital contents as an application of the proposed scheme.

• Journal of Broadcast Engineering
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• v.13 no.4
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• pp.479-487
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• 2008

The method to determine allowable interference criteria is required due to new digital FWSs(Fixed Wireless Systems) adding to allowable frequency bands, besides current FWSs and digital FWSs. In this paper, we suggested a method to define allowable interference between digital FWSs. Types of interference for FWS were defined and channel characteristics were analyzed. Allowable interference criteria were analyzed using the suggested method for M-ary QAM modulations, which is typical modulation technique of digital FWS.

• Journal of the Korean Society for Aeronautical & Space Sciences
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• v.34 no.8
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• pp.104-108
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• 2006

There are range and azimuth direction resolution of synthetic aperture radar on the aircraft or satellite. Wide bandwidth chirp pulse generation technology is prerequisite for SAR image with fine resolution. There are two kinds of digital chirp pulse generation technology as arbitrary waveform generator(AWG) and direct digital synthesizer(DDS). In this paper, we design and implement a digital chirp pulse generator to generate 300MHz wide bandwidth linear FM chirp pulse for the fine resolution image with direct digital synthesizer. Implemented chirp pulse generator can be useful for the SAR sensors to make 50cm range resolution image.

• Journal of the Institute of Convergence Signal Processing
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• v.1 no.2
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• pp.131-137
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• 2000

In this paper, as a compatible software radio transmission system, Digital-Radio conversion system which can directly change the digital signal generated by the logic circuit into radio signal is proposed. By the vector synthesis method, the digital signals can change directly into radio signal. If such a circuit is realized, RF circuit and an antenna can be composed by the simple one device, and the radio is directly controlled and performed by the software processing which is the essence of software radio. This Digital-Radio conversion system of this paper give many number of communication channels being offered by PN code and offer a hardware design flexibility by digitization, therefore it decrease the percentage ratio of hardware of system and give a more flexible function of software basis. In this paper, the principle of digital to radio signal generation algorithm is explained and the performance characteristics of proposed algorithm is shown in time base by the computer simulation method.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.21 no.7
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• pp.761-768
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• 2010

This paper presents an effective method to achieve the wideband waveform for high resolution SAR(Synthetic Aperture Radar) using the frequency multiplication technique. And also this paper analyzes the root causes for the spectral regrowth due to 3rd-order intermodulation in chirp bandwidth expansion scheme using quadrature modulator and frequency multipliers. The amplitude and phase imbalance requirement are defined based on the simulation results in terms of quadrature channel imbalance. This minimizes the degradation of range resolution, peak sidelobe ratio and integrated sidelobe ratio. The wideband chirp generator using the frequency multiplier and memory map scheme was manufactured and the compensation technique was presented to reduce the spectral regrowth of SAR waveform by minimizing the amplitude and phase imbalance. After I and Q channel imbalance adjustment, the carrier level reduces －28.7 dBm to －53.4 dBm. Chirp signal with 150 MHz bandwidth at S-band expands to 600 MHz bandwidth at X-band. The sidelobe levels are reduced by about 8 to 9 dB by compensating the amplitude balance between I and Q channels.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.35 no.7B
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• pp.1081-1090
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• 2010

$0.18{\mu}m$ CMOS UHF RFID tag frontend is presented in this paper. Several key components are highlighted: the voltage multiplier based on the threshold voltage terminated circuit, the demodulator using current mode, and the clock generator. For standard compliance, all designed components are under the EPC Global Class-1 Generation-2 UHF RFID protocol. Backscatter modulation uses the pulse width modulation scheme. Overall performance of the proposed tag chip was verified with the evaluation board. Prototype Tag Chip dimension is neary 0.77mm2 ; According to the simulation results, the reader can successfully interrogate the tag within 1.5m. where the tag consumes the power about $71{\mu}W$.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.29 no.5
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• pp.383-388
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• 2018

This paper presents a 1.8 GHz six-port-based impedance modulator using CMOS technology, which can select an arbitrary load impedance with switch control. The proposed 1.8-GHz impedance modulator comprises a Wilkinson power divider, three quadrature hybrid couplers, and four SP3T switches for each load impedance selection. The measured insertion loss of -13 dB and the input/output return losses of >10 dB are achieved in the range of 1.4~2.2 GHz. The low drop output regulator for a stable 3.3 V DC power and the serial peripheral interface(SPI) for an easy digital control are integrated. The chip size, including the pads, is $1.7{\times}1.8mm^2$.