• Journal of KIISE:Software and Applications
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• v.32 no.9
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• pp.888-900
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• 2005

Several researches have been proposed to formalize the knowledge preconditions problem - j.e., an action or a plan is epistemically feasible. However, since the feasibility is only checked at design-time and is assumed that it will also 1)e feasible at run-time, it is not suitable in the context of Semantic Web services composition, where many agents should share the limited resources required for the execution of Web services composition. Therefore, in this paper, we formalize a transactionally executable Web services composition which enables to guarantee its atomicity. Moreover, in order to formalize the transactional executability, we propose $TL-ALCFK_{NF}$ which extends TL-ALCF with the modal operators K and A. Based on $TL-ALCFK_{NF}$, we show how to carry out the epistemic reasoning with TL-ALCF as a language to represent Semantic Web services composition.

• The KIPS Transactions:PartD
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• v.16D no.4
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• pp.517-526
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• 2009

It is possible to indicate the complex design and execution of object-oriented program with dynamic UML diagram. This paper shows the way how to make several test cases from sequence, state, and activity diagram among dynamic UML diagram. Three dynamic UML diagrams about withdrawal work of ATM simulation program are drawn. Then different test cases are created from these diagrams using previously described ways. To evaluate effectiveness of test cases, mutation testing is executed. Mutants are made from MuClipse plug-in tool based on Eclipse which supports many traditional and class mutation operators. Finally we've got the result of mutation testing and compare effectiveness of test cases, etc. Through this document, we've known some hints that how to choose the way of making test cases.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.11 no.3
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• pp.500-506
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• 2007

The Type Object Design Pattern is proposed to provide a solution on the situation in the case that one class has too many subclasses or the number of subclasses are undefined. Although this pattern has many advantages in terms of applicability and dynamic object behavior, it has a weak point in runtime pattern operation that it has to build and maintain a class reference mechanism in runtime to reference the class (de facto 'object') of instances. To solve that problem, this paper addresses the solution of the runtime class reference problem of Type Object Pattern. it defines a new class of Type Object Class (TOC) from Type Class and Object Class in Type Object pattern and presents the methods of creating, compiling, and memory-loading the TOC. It depends on built-in class reference mechanism of object-oriented programming language, and is not necessary to fit with the additional mechanism. Consequently, we need not to set up the additional class reference mechanism and system performance is enhanced due to it.

• Journal of Korea Technology Innovation Society
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• v.22 no.3
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• pp.340-361
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• 2019

This study analyzes the technological structure of artificial intelligence (AI) and technological capabilities of AI companies based on patent information. 2589 AI patents registered in USPTO from 2007 to 2017 were collected and analyzed by the Latent Dirichlet Allocation (LDA) to derive 20 AI technology topics. Analysis of technology development trends by AI technology reveals that visual understanding, data analysis, motion control, and machine learning are growing, while language understanding and speech technology are sluggish. In addition, we also investigated leading companies in each sub-field of AI as well as core competencies of global IT companies. The findings of this study are expected to be fruitfully used for formulation and implementation of technology strategy of AI companies.

• Journal of Digital Convergence
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• v.16 no.12
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• pp.309-315
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• 2018

In this paper, propose an efficient arc detection and control method to achieve fast machining speed, improved precision and surface roughness in discharge machining, especially for carbide and hard material processing and metal processing using discharge phenomenon as energy. A single discharge waveform is divided into three sections of Td (Time-Delay), Ton (Time-on) and Toff (Time-off) and the gate control timing is simulated using the HDL language. In this paper, we analyze the effect of the gap between the electrode and the workpiece on the machining results by determining the operation of the servo mechanism by sampling the Td section through the comparator circuit. As a result of the analysis, the Td section of the formed waveform was more precisely sampled at a high speed and the results were improved when applied to the gap control between the electrode and the workpiece.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.24 no.2
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• pp.244-251
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• 2020

This paper presents a design of the Meta-Class Repository (MCR) which maintain syntactically analyzed and structured meta-class information from UML diagrams, and then proposes 'meta-class,' also known as super-class, to construct structured information analyzed syntactically. The MCR is a collection of these meta-classes which contains the information extracted from diagrams. This paper also presents a design of the Code Generation Engine (CGE) which roles generating codes corresponding classes from UML diagrams based on the MCR maintaining a collection of meta-classes which is syntactically-analyzed and constructed in previous process. The logics of CGE are designed to generate codes collaborated with MCR and CGE with integration. The logics of CGE mechanism is presented with the form of finite state machine to present the algorithms of code generation formally and have the advantages of simplicity and easiness in development.

• The Journal of Korean Institute of Next Generation Computing
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• v.14 no.5
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• pp.7-18
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• 2018

Recently, serverless computing is spotlighted. Because it supports the development of application based on micro-service. Micro-service means a small-scale service that can operate independently. Applications with micro-service units have the advantage of enabling individual updates, easy and fast deployment. In addition, it has the advantage of supporting various languages and platforms for each service. Therefore many enterprise are trying to change from monolithic architecture to micro-service based architecture. However, there is a lack of research on methods and baseline for micro-service construction. In this paper, a method is proposed to construct the micro-service unit by analyzing UML design in monolithic application. It also shows the proposed approach can reconstruct monolithic application into micro-service based unit by implementing the constructed micro-services in a real serverless platform environment. In addition, the results of the comparative evaluation with the related studies are presented.

• The Journal of Korean Institute of Information Technology
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• v.17 no.7
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• pp.31-45
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• 2019

The core technologies for intelligent services today are deep learning, that is neural networks, and parallel and distributed processing technologies such as GPU parallel computing and big data. However, for intelligent services and knowledge sharing services through globally shared ontologies in the future, there is a technology that is better than the neural networks for representing and reasoning knowledge. It is a knowledge representation of IF-THEN in RIF or SWRL, which is the standard rule language of the Semantic Web, and can be inferred efficiently using the rete algorithm. However, when the number of rules processed by the rete algorithm running on a single computer is 100,000, its performance becomes very poor with several tens of minutes, and there is an obvious limitation. Therefore, in this paper, we analyze the past and current studies on parallel and distributed processing of rete algorithm, and examine what aspects should be considered to implement an efficient rete algorithm.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.25 no.2
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• pp.259-266
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• 2021

USB bus not only works with convenience but also transmits data fast and becomes a standard peripheral interface between FPGA development board and personal computer. In this paper FPGA verification system with slave FIFO interface for Cypress FX3 USB 3 bridge chip was implemented. The designed slave FIFO interface consists of host interface module based on FIFO structure, master bus controller and command decoder and supports streaming communication interface for FX3 bridge chip and memory-mapped input and output interface for user design circuit. The ZestSC3 board with Cypress FX3 USB 3 bridge chip and Xilinx Artix FPGA(XC7A35T-1C5G3241) was used to implement FPGA verification system. It was verified that the FPGA verification system for user design circuit operated correctly under various clock frequencies using GUI software developed by visual C# and C++ DLL. The designed slave FIFO interface for FPGA verification system has modular structure and can be applicable to the different user designs with memory-mapped I/O interface.

• The Journal of the Korea institute of electronic communication sciences
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• v.16 no.6
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• pp.1355-1362
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• 2021

Recently, not only congenital hearing impairment, but also the number of people with hearing impairment due to acquired factors is increasing. The environment in which sign language can be learned is poor. Therefore, this study intends to present a sign language (sign language number/sign language text) evaluation system as a sign language learning assistance tool for sign language learners. Therefore, in this paper, sign language is captured as an image using OpenCV and Convolutional Neural Network (CNN). In addition, we study a system that recognizes sign language behavior using MediaPipe, converts the meaning of sign language into text-type data, and provides it to users. Through this, self-directed learning is possible so that learners who learn sign language can judge whether they are correct dez. Therefore, we develop a sign language learning assistance system that helps us learn sign language. The purpose is to propose a sign language learning assistance system as a way to support sign language learning, the main language of communication for the hearing impaired.