• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2014.05a
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• pp.790-791
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• 2014

본 논문에서는 처음 레이아웃을 접하는 학생들이 쉽게 레이아웃을 할 수 있도록 논리게이트의 입력 수에 따른 소스/드레인 접합면의 개수 및 출력 단자에 연결되는 드레인 접합면의 개수를 간단한 수식으로 설명하고자 한다. 일반적으로 디지털 회로에서는 직렬로 연결되는 트랜지스터의 경우 하나의 접합면으로 트랜지스터의 소스와 또 다른 트랜지스터의 드레인으로 동작하도록 레이아웃 된다. 그리고 출력 단자에 연결되는 드레인 접합면의 개수를 줄어야만 논리게이트의 동작속도를 향상시킬 수 있다. 그러므로 출력단자를 구성하는 드레인 접합의 개수를 수식으로 제시하고 설명함으로서 초보자도 쉽게 레이아웃을 할 수 있도록 하고자 한다.

• Journal of the Microelectronics and Packaging Society
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• v.26 no.3
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• pp.63-69
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• 2019

Soldering technology has been used in electronic industry for a long time. However, due to solder fatigue characteristics, automotive electronics are searching the semi-permanent interconnection technology such as press-fit method. Press fit interconnection is a joining technology that mechanically inserts a press fit metal terminal into a through hole in a board, and induces a strong bonding by closely contacting the inner surface joining of the through hole by plastic deformation of press-fit terminal. In this paper, the bonding properties of press-fit interconnection are investigated with PCB hole size and surface finishes. In order to compare interconnection reliability between the press fit and soldering, the change in resistance of the press-fit and soldering joints was observed during thermal shock test. After thermal cycling, the failure modes are investigated to reveal the degradation mechanism both press-fit and soldering technology.

• Journal of the Korean Society of Manufacturing Technology Engineers
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• v.21 no.1
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• pp.70-75
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• 2012

The technique with ultrasonic vibration refers to the many industries. Especially Ultrasonic Connection Method is widely used for mobile battery, secondary battery, automobile components and also they recently started using it for terminal connecting of solar community battery. In this study, ultrasonic welding horn is analysed and designed with FEM, then manufactured based on it. Resonance frequency and amplitude of horn would be measured and compared with the designing result to judge the suitability. Al/Al specimen is welded by the manufactured horn and verify its performance via the weldability evaluation.

• Proceedings of the KWS Conference
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• 2005.11a
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• pp.213-215
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• 2005

• Superconductivity and Cryogenics
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• v.4 no.1
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• pp.28-33
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• 2002

디지털 소자 구현에 가장 기본적인 조셉슨 접합의 특성 중 잘 알려진 특성이 아닌 자기장 하에서 접합의 거동을 살펴보았다. 자기장이 접합면에서 평행하게 걸린 경우에는 임계온도 이하에서도 어느 특정 온도에서 저항이 나타나는데 이는 그 때 접합을 투과하는 자속이 단자속의 정수배가 되는 경우에 해당함을 보였다. 이로부터 초전도 전극의 침투깊이의 크기와 온도의존성을 구할 수 있었다. 자기장이 접합면에 수직하게 걸린 경우에는 자기장이 볼텍스의 형태로 전극에 침투하여 전체접합을 볼텍스의 수로 나누는 역할을 함을 보였다. 이로써 자기장이 증가할수록 저항전이 폭이 증가함을 설명할 수 있었고 이는 고온초전도체의 거동을 이해하는 데에도 사용될 수 있음을 보였다.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.15 no.10
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• pp.2065-2071
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• 2011

The external quality factor ($Q_e$) is controlled by coupling condition between resonator and input/output ports in design of microwave filter. In this paper, we represent extracting method of external quality factor using phase response for resonator with input/output ports according to position of feed line from microstrip line resonator. The results regarding to position, coupling gap and line width for tapped line and coupled line structure are represented, and we got the exact $Q_e$ value from the this method. This results will be applied to coupled resonator filter design.

• Electrical & Electronic Materials
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• v.6 no.6
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• pp.505-513
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• 1993

본 논문은 전자 부품의 Soldring기에 사용되는 접합제를 Flux를 포함한 Solder paste 대신에 도금막을 이용하기 위한 Sn 도금막 형성 프로세스를 검토한 것이다. 반도체 Device를 Packaging한 외부단자(lead frame)과 HIC상의 후막전극(Ag/Pd)과의 접합 및 PCB상의 Cu land와의 접합시에는 스크린 프린트에 의한 Solder Paste가 일반적으로 사용되고 있다. 본 논문은 Fluxless Soldering의 한수단으로 도금막을 lead상에 형성시켜 접합 재료로서의 형성 프로세스 및 도금막의 특성과 도금형성 Paramete와의 관련성을 실험적으로 검토한 것으로 전류밀도 200 A/m$^{2}$의 조건으로 형성한 Sn 도금막이 접합용으로 최적조건임을 밝혔다.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.21 no.4
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• pp.789-794
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• 2017

Subthreshold current model is presented using analytical potential distribution of junctionless cylindrical surrounding-gate (CSG) MOSFET and threshold voltage shift is analyzed by this model. Junctionless CSG MOSFET is significantly outstanding for controllability of gate to carrier flow due to channel surrounded by gate. Poisson's equation is solved using parabolic potential distribution, and subthreshold current model is suggested by center potential distribution derived. Threshold voltage is defined as gate voltage corresponding to subthreshold current of $0.1{\mu}A$, and compared with result of two dimensional simulation. Since results between this model and 2D simulation are good agreement, threshold voltage shift is investigated for channel dimension and doping concentration of junctionless CSG MOSFET. As a result, threshold voltage shift increases for large channel radius and oxide thickness. It is resultingly shown that threshold voltage increases for the large difference of doping concentrations between source/drain and channel.

• Journal of the Computational Structural Engineering Institute of Korea
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• v.16 no.2
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• pp.173-182
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• 2003

In equivalent static nonlinear analysis and in energy-based design, the structures are generally transformed into an equivalent SDOF system. In this study the seismic energy demands in multi story structures, such as three-, eight-, and twenty-story steel moment-resisting frames(MRF), buckling restrained braced frames(BRBF) and a damage tolerant braced frame(DTBF), are compared with those of equivalent single degree of freedom(ESDOF) systems. Sixty earthquake ground motions recorded In different soil conditions, which are soft rock, soft soil, and neat fault, were used to compute the input and hysteretic energy demands in model structures. In case the modal mass coefficient is less than 0.8, the effects of higher modes are considered in the process of converting into ESDOF According to the analysis results, the hysteretic and input energies obtained from 3 story and 8 story MRF and DTBF agreed well with the results from analysis of equivalent SDOF systems. However in the 20 story BRBF the results from ESDOF underestimated those obtained from the original structures.

• Journal of the Microelectronics and Packaging Society
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• v.24 no.2
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• pp.23-27
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• 2017

This paper proposes an approach to predict the reliability of high temperature heaters by identifying their primary failure modes and mechanisms in the field. Test specimens were designed to have the equivalent stress conditions with the high temperature heaters in the field in order to examine the effect of stress conditions on the solder joint failures. There failures often result from cracking due to intermetallic compound (IMC) or void formation within a solder joint. Aging tests have been performed by exposing the test specimens to a temperature of $170^{\circ}C$ in order to reproduce solder joint failures in the field. During the test, changes in IMC formation were investigated by scanning electron microscopy (SEM) on the cross-sections of the test specimens, while changes in void formation were monitored both by resistance spectroscopy and by micro-computed tomography (microCT), alternately. The test results demonstrated the void volume within the solder increased as the time at the high temperature increased. Also, the phase shift of high frequency resistance was found to have high correlation with the void volume. These results implied the failure of high temperature heaters can be non-destructively predicted based on the correlation.