• Title/Summary/Keyword: 금속급 실리콘

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Purification of Metallurgical Grade Silicon by Plasma Torch and E-beam Treatment (플라즈마 토치와 전자빔을 이용한 금속급 실리콘 정제)

  • Eum, Jung-Hyun;Nahm, Sahn;Hwang, Kwang-Taek;Kim, Kyung-Ja;Choi, Kyoon
    • Journal of the Korean Ceramic Society
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    • v.47 no.6
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    • pp.618-622
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    • 2010
  • Cost-effective purification methods of silicon were carried out in order to replace the conventional Siemens method for solar grade silicon. Firstly, acid leaching which is a hydrometallurgical process was preceded with grinded silicon powders of metallurgical grade (~99% purity) to remove metallic impurities. Then, plasma treatments were performed with the leached silicon powders of 99.94% purity by argon plasma at 30 kW power under atmospheric pressure. Plasma treatment was specifically efficient for removing Zr, Y, and P but not for Al and B. Another purification step by EB treatment was also studied for the 99.92% silicon lump which resulted in the fast removal of boron and aluminum. That means the two methods are effective alternative tools for removing the doping elements like boron and phosphor.

Nano-thick Nickel Silicide and Polycrystalline Silicon on Glass Substrate with Low Temperature Catalytic CVD (유리 기판에 Catalytic CVD 저온공정으로 제조된 나노급 니켈실리사이드와 결정질 실리콘)

  • Song, Ohsung;Kim, Kunil;Choi, Yongyoon
    • Korean Journal of Metals and Materials
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    • v.48 no.7
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    • pp.660-666
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    • 2010
  • 30 nm thick Ni layers were deposited on a glass substrate by e-beam evaporation. Subsequently, 30 nm or 60 nm ${\alpha}-Si:H$ layers were grown at low temperatures ($<220^{\circ}C$) on the 30 nm Ni/Glass substrate by catalytic CVD (chemical vapor deposition). The sheet resistance, phase, microstructure, depth profile and surface roughness of the $\alpha-Si:H$ layers were examined using a four-point probe, HRXRD (high resolution Xray diffraction), Raman Spectroscopy, FE-SEM (field emission-scanning electron microscopy), TEM (transmission electron microscope) and AES depth profiler. The Ni layers reacted with Si to form NiSi layers with a low sheet resistance of $10{\Omega}/{\Box}$. The crystallinty of the $\alpha-Si:H$ layers on NiSi was up to 60% according to Raman spectroscopy. These results show that both nano-scale NiSi layers and crystalline Si layers can be formed simultaneously on a Ni deposited glass substrate using the proposed low temperature catalytic CVD process.

Silicidation Reaction Stability with Natural Oxides in Cobalt Nickel Composite Silicide Process (자연산화막 존재에 따른 코발트 니켈 복합실리사이드 공정의 안정성)

  • Song, Oh-Sung;Kim, Sang-Yeob;Kim, Jong-Ryul
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.8 no.1
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    • pp.25-32
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    • 2007
  • We investigated the silicide reaction stability between 10 nm-Col-xNix alloy films and silicon substrates with the existence of 4 nm-thick natural oxide layers. We thermally evaporated 10 nm-Col-xNix alloy films by varying $x=0.1{\sim}0.9$ on naturally oxidized single crystal and 70 nm-thick polycrystalline silicon substrates. The films structures were annealed by rapid thermal annealing (RTA) from $600^{\circ}C$ to $1100^{\circ}C$ for 40 seconds with the purpose of silicidation. After the removal of residual metallic residue with sulfuric acid, the sheet resistance, microstructure, composition, and surface roughness were investigated using a four-point probe, a field emission scanning electron microscope, a field ion bean4 an X-ray diffractometer, and an Auger electron depth profiling spectroscope, respectively, to confirm the silicide reaction. The residual stress of silicon substrate was also analyzed using a micro-Raman spectrometer We report that the silicide reaction does not occur if natural oxides are present. Metallic oxide residues may be present on a polysilicon substrate at high silicidation temperatures. Huge residual stress is possible on a single crystal silicon substrate at high temperature, and these may result in micro-pinholes. Our results imply that the natural oxide layer removal process is of importance to ensure the successful completion of the silicide process with CoNi alloy films.

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Evaluation of Efficiency after Treated with Consolidant of 1T1G_5 wt 0.08 % in the Field on Granite (화강암에 대한 강화제 1T1G_5 wt 0.08 %의 야외 처리 후 효율 평가)

  • Do, Jin Young;Jang, Yun Deug;Kim, Jeong Jin
    • Journal of the Mineralogical Society of Korea
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    • v.27 no.3
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    • pp.149-158
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    • 2014
  • Consolidants were extended use for conservation of weathered stone heritage. Epoxy, acryl, isocyanate, and alkoxysilane consolidants are most commonly used products. Consolidant of 1T1G_5 wt 0.08 % that consists of T (TEOS: Tetraethyl Orthosilicate) and G (GPTMS: 3-Glycidoxy propyl trimethoxy silane) were used this study. A shore hardness values show increasing after treated with consolidant in granite. Surface brightness after treated with consolidant are changing slightly dark but turns the original color over time. Ultra-sonic velocity is increased after treated with consolidant but slightly reduced over time to remain constant. It has the advantage of being effective after treated with consolidant in granite and efficiency of consolidation increase with slow velocity before treated with consolidant.

Property of Nano-thick Silicon Films Fabricated by Low Temperature Inductively Coupled Plasma Chemical Vapor Deposition Process (저온 ICP-CVD 공정으로 제조된 나노급 실리콘 박막의 물성)

  • Shen, Yun;Sim, Gapseop;Choi, Yongyoon;Song, Ohsung
    • Korean Journal of Metals and Materials
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    • v.49 no.4
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    • pp.313-320
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    • 2011
  • 100 nm-thick hydrogenated amorphous silicon $({\alpha}-Si:H)$ films were deposited on a glass and glass/30 nm Ni substrates by inductively-coupled plasma chemical vapor deposition (ICP-CVD) at temperatures ranging from 100 to $550^{\circ}C$. The sheet resistance, microstructure, phase transformation and surface roughness of the films were characterized using a four-point probe, AFM (atomic force microscope), TEM (transmission electron microscope), AES (Auger electron spectroscopy), HR-XRD(high resolution X-ray diffraction), and micro-Raman spectroscopy. A nano-thick NiSi phase was formed at substrate temperatures >$400^{\circ}C$. AFM confirmed that the surface roughness did not change as the substrate temperature increased, but it increased abruptly to 6.6 nm above $400^{\circ}C$ on the glass/30 nm Ni substrates. HR-XRD and micro-Raman spectroscopy showed that all the Si samples were amorphous on the glass substrates, whereas crystalline silicon appeared at $550^{\circ}C$ on the glass/30 nm Ni substrates. These results show that crystalline NiSi and Si can be prepared simultaneously on Ni-inserted substrates.

Fabrication of a-Si:H/a-Si:H Tandem Solar Cells on Plastic Substrates (플라스틱 기판 위에 a-Si:H/a-SiGe:H 이중 접합 구조를 갖는 박막 태양전지 제작)

  • Kim, Y.H.;Kim, I.K.;Pyun, S.C.;Ham, C.W.;Kim, S.B.;Park, W.S.;Park, C.K.;Kang, H.D.;You, C.;Kang, S.H.;Kim, S.W.;Won, D.Y.;Choi, Y.;Nam, J.H.
    • 한국신재생에너지학회:학술대회논문집
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    • 2011.05a
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    • pp.104.1-104.1
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    • 2011
  • 가볍고, 유연성(flexibility)을 갖는 박막(thin film)형 플랙서블 태양전지(flexible solar cell)는 상황에 따른 형태의 변형이 가능하여, 휴대가 간편하고, 기존 혹은 신규 구조물의 지붕(rooftop)등에 설치가 용이하여, 차세대 성장 동력 분야에서 각광받고 있다. 그러나 아직까지 플랙서블 태양전지는 제작시 열에 의한 기판의 변형, 기판 이송시 너울 현상, 대면적 패터닝(patterning) 기술 등 많은 어려움 등으로 웨이퍼나 글라스 기판에 제조된 태양전지 대비 낮은 광전환 효율을 갖는다. 따라서 본 연구에서는 플랙서플 태양전지 성능개선을 위해 3.5세대급 ($450{\times}450cm^2$) 스퍼터(sputter), 금속유기 화학기상장치 (MOCVD), 플라즈마 화학기상장치 (PECVD), 레이저 가공장치 (Laser scriber)를 이용하여 a-Si:H/a-SiGe:H 이중접합(tandem)을 갖는 태양전지를 제작하였고, 광 변환효율 특성을 평가하였다. 전도도(conductivity), 라만(Raman)분광 및 UV/Visible 분광 분석을 통하여 박막의 전기적, 구조적, 광학적 물성을 평가하여 단위박막의 물성을 최적화 했다. 또한 제작된 태양전지는 쏠라 시뮬레이터 (Solar Simulator)를 이용하여 성능 평가를 수행하였고, 상/하부층의 전류 정합 (current matching)을 위해 외부양자효율 (external quantum efficiency) 분석을 수행하였다. 제작된 이중접합 접이식 태양전지로 소면적($0.25cm^2$)에서 8.7%, 대면적($360cm^2$ 이상) 8.0% 이상의 효율을 확보하였으며, 성능 개선을 위해 대면적 패턴 기술 향상 및 공정 기술 개선을 수행 중이다.

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Property of Nickel Silicides with Hydrogenated Amorphous Silicon Thickness Prepared by Low Temperature Process (나노급 수소화된 비정질 실리콘층 두께에 따른 저온형성 니켈실리사이드의 물성 연구)

  • Kim, Jongryul;Choi, Youngyoun;Park, Jongsung;Song, Ohsung
    • Korean Journal of Metals and Materials
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    • v.46 no.11
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    • pp.762-769
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    • 2008
  • Hydrogenated amorphous silicon(a-Si : H) layers, 120 nm and 50 nm in thickness, were deposited on 200 $nm-SiO_2$/single-Si substrates by inductively coupled plasma chemical vapor deposition(ICP-CVD). Subsequently, 30 nm-Ni layers were deposited by E-beam evaporation. Finally, 30 nm-Ni/120 nm a-Si : H/200 $nm-SiO_2$/single-Si and 30 nm-Ni/50 nm a-Si:H/200 $nm-SiO_2$/single-Si were prepared. The prepared samples were annealed by rapid thermal annealing(RTA) from $200^{\circ}C$ to $500^{\circ}C$ in $50^{\circ}C$ increments for 30 minute. A four-point tester, high resolution X-ray diffraction(HRXRD), field emission scanning electron microscopy (FE-SEM), transmission electron microscopy (TEM), and scanning probe microscopy(SPM) were used to examine the sheet resistance, phase transformation, in-plane microstructure, cross-sectional microstructure, and surface roughness, respectively. The nickel silicide on the 120 nm a-Si:H substrate showed high sheet resistance($470{\Omega}/{\Box}$) at T(temperature) < $450^{\circ}C$ and low sheet resistance ($70{\Omega}/{\Box}$) at T > $450^{\circ}C$. The high and low resistive regions contained ${\zeta}-Ni_2Si$ and NiSi, respectively. In case of microstructure showed mixed phase of nickel silicide and a-Si:H on the residual a-Si:H layer at T < $450^{\circ}C$ but no mixed phase and a residual a-Si:H layer at T > $450^{\circ}C$. The surface roughness matched the phase transformation according to the silicidation temperature. The nickel silicide on the 50 nm a-Si:H substrate had high sheet resistance(${\sim}1k{\Omega}/{\Box}$) at T < $400^{\circ}C$ and low sheet resistance ($100{\Omega}/{\Box}$) at T > $400^{\circ}C$. This was attributed to the formation of ${\delta}-Ni_2Si$ at T > $400^{\circ}C$ regardless of the siliciation temperature. An examination of the microstructure showed a region of nickel silicide at T < $400^{\circ}C$ that consisted of a mixed phase of nickel silicide and a-Si:H without a residual a-Si:H layer. The region at T > $400^{\circ}C$ showed crystalline nickel silicide without a mixed phase. The surface roughness remained constant regardless of the silicidation temperature. Our results suggest that a 50 nm a-Si:H nickel silicide layer is advantageous of the active layer of a thin film transistor(TFT) when applying a nano-thick layer with a constant sheet resistance, surface roughness, and ${\delta}-Ni_2Si$ temperatures > $400^{\circ}C$.

Property of Nickel Silicides with 10 nm-thick Ni/Amorphous Silicon Layers using Low Temperature Process (10 nm-Ni 층과 비정질 실리콘층으로 제조된 저온공정 나노급 니켈실리사이드의 물성 변화)

  • Choi, Youngyoun;Park, Jongsung;Song, Ohsung
    • Korean Journal of Metals and Materials
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    • v.47 no.5
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    • pp.322-329
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    • 2009
  • 60 nm- and 20 nm-thick hydrogenated amorphous silicon (a-Si:H) layers were deposited on 200 nm $SiO_2/Si$ substrates using ICP-CVD (inductively coupled plasma chemical vapor deposition). A 10 nm-Ni layer was then deposited by e-beam evaporation. Finally, 10 nm-Ni/60 nm a-Si:H/200 nm-$SiO_2/Si$ and 10 nm-Ni/20 nm a-Si:H/200 nm-$SiO_2/Si$ structures were prepared. The samples were annealed by rapid thermal annealing for 40 seconds at $200{\sim}500^{\circ}C$ to produce $NiSi_x$. The resulting changes in sheet resistance, microstructure, phase, chemical composition and surface roughness were examined. The nickel silicide on a 60 nm a-Si:H substrate showed a low sheet resistance at T (temperatures) >$450^{\circ}C$. The nickel silicide on the 20 nm a-Si:H substrate showed a low sheet resistance at T > $300^{\circ}C$. HRXRD analysis revealed a phase transformation of the nickel silicide on a 60 nm a-Si:H substrate (${\delta}-Ni_2Si{\rightarrow}{\zeta}-Ni_2Si{\rightarrow}(NiSi+{\zeta}-Ni_2Si)$) at annealing temperatures of $300^{\circ}C{\rightarrow}400^{\circ}C{\rightarrow}500^{\circ}C$. The nickel silicide on the 20 nm a-Si:H substrate had a composition of ${\delta}-Ni_2Si$ with no secondary phases. Through FE-SEM and TEM analysis, the nickel silicide layer on the 60 nm a-Si:H substrate showed a 60 nm-thick silicide layer with a columnar shape, which contained both residual a-Si:H and $Ni_2Si$ layers, regardless of annealing temperatures. The nickel silicide on the 20 nm a-Si:H substrate had a uniform thickness of 40 nm with a columnar shape and no residual silicon. SPM analysis shows that the surface roughness was < 1.8 nm regardless of the a-Si:H-thickness. It was confirmed that the low temperature silicide process using a 20 nm a-Si:H substrate is more suitable for thin film transistor (TFT) active layer applications.