• Journal of KIISE:Computer Systems and Theory
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• v.27 no.2
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• pp.177-187
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• 2000

In the past several years, many systems which adopted ring topology with high-speed unidirectional point-to-point links have emerged to overcome the limit of bus for interconnection network of clustered multiprocessor system. However, rapid increase of processor speed and performance improvement of local bus and memory system limit scalability of system with point-to-point link of standard bandwidth. Therefore, necessity to extend bandwidth is emphasized. In this paper, we adopt PANDA system as base model, which is clustering-based multiprocessor system. By simulating a model adopting commercial processor and local bus specification, we show that point-to-point link is bottleneck of system performance, and bandwidth expansion by more than 200% is needed. To expand bandwidth of interconnection network, it needs excessive design cost and time to develop new point-to-point link with doubled bandwidth. As an alternative to double bandwidth, we propose several ways to implement dual ring -simple dual ring, transaction-separated dual ring, direction-separated dual ring- by using off-the-shelf point-to-point links with IEEE standard bandwidth. We analyze pros. and cons. of each model compared with doubled-bandwidth single ring by simulation.

• Proceedings of the Korean Society of Dyers and Finishers Conference
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• 2012.03a
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• pp.64-64
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• 2012

아라미드는 일반적인 유기섬유와는 다른 우수한 역학적 성질을 바탕으로 보호의류 중에서 방탄방호 및 방검보호 의류에 사용되는 고부가 소재이다. 현재까지 ATY기계에서 사의 구조와 물성에 큰 영향을 미치는 Nozzle의 구조에 대한 연구결과는 많이 발표되어왔다. 그러나 최근 들어 소방방화방 검용 보호의류에 많이 사용되는 아라미드사에 ATY 공정 중에서 Nozzle의 직경이 ATY사의 물성에 어떤 영향을 미치는가에 대한 연구는 발표된 바가 없다. 따라서 본 연구에서는 Para-aramid/Nylon hybrid사를 이용하여 ATY로 제조할 경우, 표면에 생기는 loop로 인하여 타 소재와 접착시, 접착제 담지 성능이 향상되어 접착력이 상승되는 반면 아라미드 Hybrid사의 역학물성은 ATY가 가공되기 전의 물성보다 저하되는 약점을 가지고 있다. 따라서 본 연구에서는 ATY 제조공정에서 Nozzle의 직경을 달리할 때 Aramid/Nylon Hybrid ATY사의 물성변화를 분석함으로서 방화복과 방검용 보호의류에 적합한 아라미드 ATY사를 개발하고자 한다. 본 연구에서는 ATY 제조공정 중 다른 공정조건은 동일하게 하고 Nozzle의 직경을 0.6, 0.75, 1, 1.2mm로 변경하여 4가지 시료를 준비하고 물성분석을 위하여 제조된 시료의 강신도, 초기탄성률을 각각 측정하여 인장특성을 확인하였으며, 건열수축률과 습열수축률을 측정하여 시료의 열 수축률을 측정 분석하였다. 표면의 루프 발현 정도를 보기위하여 형태 불안정성을 측정 평가하였으며 영상현미경시스템을 사용하여 표면특성을 측정 평가하여 다음과 같은 결론을 얻었다. Nozzle의 직경이 증가함에 따라 절단강도는 30% 감소하였고 초기탄성률은 3배 가까이 감소하였다. 그리고 절단신도는 2배정도 증가하는 경향을 나타내었다. 또한 Nozzle의 직경이 증가함에 따라 ATY hybrid사의 건 습열수축률이 증가하다가 직경이 1.2mm일 때 감소하는 경향을 나타내었고 직경 변화에 따라 4~6%의 열 수축률의 분포를 보였다. Para-aramid/Nylon hybrid사의 형태불안정성은 0.3~0.5%를 분포를 나타내었고 Nozzle의 직경이 0.6, 1mm일 때 상대적으로 낮은 ATY의 불안정성이 확인되었다. Nozzle의 직경이 감소할수록 loop의 엉킴이 적으며 flat하였으며 직경이 1.2mm일 때 가장 조밀하고 표면에 loop가 많이 형성된 것을 확인하였다.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.19 no.10
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• pp.121-127
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• 2018

A system for diagnosing surface defects of long and large pipe inner overlay welds, 1m in diameter and 6m in length, was developed using a Liquid Penetrant Test (PT). First, CATIA was used to model all major units and PT machines in 3-dimensions. They were used for structural strength analysis and strain analysis, and to check the motion interference phenomenon of each unit to produce two-dimensional production drawings. Structural strength analysis and deformation analysis using the ANSYS results in a maximum equivalent stress of 44.901 MPa, which is less than the yield tensile strength of SS400 (200 MPa), a material of the PT Machine. An examination of the performance of the developed equipment revealed a maximum travel speed of 7.2 m/min., maximum rotational speed of 9 rpm, repeatable position accuracy of 1.2 mm, and inspection speed of $1.65m^2/min$. The results of the automatic PT-inspection system developed to check for surface defects, such as cracks, porosity, and undercut, were in accordance with the method of ASME SEC. V&VIII. In addition, the results of corrosion testing of the overlay weld layer in accordance with the ferric chloride fitting test by the method of ASME G48-11 indicated that the weight loss was $0.3g/m^2$, and met the specifications. Furthermore, the chemical composition of the overlay welds was analyzed according to the method described in ASTM A375-14, and all components met the specifications.

• Proceedings of the Korean Information Science Society Conference
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• 2003.10a
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• pp.97-99
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• 2003

대부분의 웹 문서들은 HTML이나 XML로 표현된 웹의 정보들은 Syntactic 구조를 기반으로 표현되기 때문에, 소프트웨어가 정보를 처리하는데 한계가 있다. HTML은 문서의 display안을 위한 tag기반의 문서 표현 방식이고, XML은 문서의 구조를 사람이 이해하기 쉽도록 제안된 표현 방식이기 때문이다. 따라서, HTML 및 XML로 표현된 정보들을 가지고 서비스를 제공하는 웹 에이전트들은 사용자들에게 의미있는 서비스를 제공하기 위해 오프라인 상에서 많은 수작업을 수행해야만 했다. 이와 같은 문제점을 극복하기 위해서 미국과 유럽에서는 시멘틱 웹에 대한 연구를 활발히 진행하고 있다. 시멘틱 웹은 기존의 웹과는 달리 소프트웨어가 이해하고 처리 할 수 있는 형태(machine processable)로 정보를 표현하기 때문에 오프라인 상에서 수행되던 많은 작업들을 에이전트가 이해하고 처리할 수 있게 되었다. 그러나. 온톨로지를 구축하는 과정에서도 필연적으로 정보의 31(Incorrect, incomplete, Inconsistence)가 나타나고, 서비스의 결과 또한 온톨로지에 의해 좌우된다는 단점이 있다. 본 논문에서 제안하는 후방향 추론기법을 이용한 추론엔진은 다음과 같은 시스템을 제안한다. 첫째. 시멘틱 웹을 이용함으로써 소프트웨어 에이전트의 자동화 시스템을 제안한다. 둘째 은톨로지 정보의 한계성을 극복하기 위해 규칙기반의 후방향 추론 기법을 사용하는 시멘틱 추론엔진을 제안한다. 본 논문에서 제안하는 후방향 추론기법을 이용한 시멘틱 추론시스템은 사용자의 질의를 입력받아. 온톨로지와 시멘틱 웹 문서의 정보를 이용하여 후방향 추론을 수행함으로써 웹 정보의 불완전성을 완화하고, 온톨로지의 영향력를 감소시킴으로써 웹 서비스의 질을 향상시키는데 목적이 있다.RED에 비해 향상된 성능을 보여주었다.웍스 네트워크상의 다양한 디바이스들간의 네트워크 다양화와 분산화 기능을 얻을 수 있었고, 기존의 고가의 해외 솔루션인 Echelon사의 LonMaker 소프트웨어를 사용하지 않고도 국내의 순수 솔루션인 리눅스 기반의 LonWare 3.0 다중 바인딩 기능을 통해 저 비용으로 홈 네트워크 구성 관리 서버 시스템 개발에 대한 비용을 줄일 수 있다. 기대된다.e 함량이 대체로 높게 나타났다. 점미가 수가용성분에서 goucose대비 용출함량이 고르게 나타나는 경향을 보였고 흑미는 알칼리가용분에서 glucose가 상당량(0.68%) 포함되고 있음을 보여주었고 arabinose(0.68%), xylose(0.05%)도 다른 종류에 비해서 다량 함유한 것으로 나타났다. 흑미는 총식이섬유 함량이 높고 pectic substances, hemicellulose, uronic acid 함량이 높아서 콜레스테롤 저하 등의 효과가 기대되며 고섬유식품으로서 조리 특성 연구가 필요한 것으로 사료된다.리하였다. 얻어진 소견(所見)은 다음과 같았다. 1. 모년령(母年齡), 임신회수(姙娠回數), 임신기간(姙娠其間), 출산시체중등(出産時體重等)의 제요인(諸要因)은 주산기사망(周産基死亡)에 대(對)하여 통계적(統計的)으로 유의(有意)한 영향을 미치고 있어 $25{\sim}29$세(歲)의 연령군에서, 2번째 임신과 2번째의 출산에서 그리고 만삭의 임신 기간에, 출산시체중(出産時體重) $3.50{\sim}3.99kg$사이의 아이에서 그 주산기사망률(周産基死亡率)이 각각 가장 낮았다. 2. 사산(死産)과 초생아사망(初生兒死亡)을 구분(區分)하여 고려해 볼때 사산(死産)은 모성(母性)의 임신력(姙娠歷)과 매우 밀접한 관련이 있는 것으

• Journal of rehabilitation welfare engineering & assistive technology
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• v.5 no.1
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• pp.17-25
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• 2011

This paper aims to find the optimal control gain for enhancing the convenience of electric walking frames and design a control algorithm. With the recent advances in medical technology, there has been a rapid increase in the aging population and a variety of mobile walking frames have been developed for improvement of the quality of life. However, the manual walking frames of such mobile aids don't have any electric motor which helps facilitate elderly users' walking and thus are not efficient enough for the old people of weak strength to use especially when moving on uneven surfaces such as slopes or thresholds. The types of electric walking frames have been developed to overcome such inefficiency. Electric walking frames require users' control operations for motor driving unlike manual frames. Therefore, when they are not properly handled, it causes considerable inconvenience to their users. The present study compared the electric walking frames with manual ones in terms of operational convenience and attempted to improve the user convenience of walking frames varying the control value for user convenience based on certain standards. This paper presented a haptic sensor designed to recognize the will to walk and measure the degree of convenience and proposed a control algorithm for improvement of convenience. For user convenience, this paper evaluated the relative convenience of walking frames in view of changing differences between the center of vehicle (COV) and the center of position (COP). With the employment of an electric walking frame and a new measuring method, all the processes were experimentally tested and validated.

• Polymer(Korea)
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• v.33 no.5
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• pp.407-412
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• 2009

Vacuum deposited N,N-di-1-naphthyl-N,N-diphenyl-1,1'-biphenyl-4,4'-diamine (NPD) as a hole transporting (HTL) materials in OLEDs was placed on PEDOT-PSS, a hole injection layer (HIL). PEDOT-PSS was spin-coated on to the ITO glass. $C_{60}$-doped NPD-$C_{60}$(10 wt%) film was formed via co-evaporation process and the morphology of NPD-$C_{60}$ films was investigated using XRD and AFM. The J - V, L - V and current efficiency of multi -layered devices were characterized. According to XRD results, the deposited $C_{60}$ thin film was partially crystalline, but NPD-$C_{60}$ film was observed not to be crystalline, which indicates that $C_{60}$ molecules are uniformly dispersed in the NPD film. By using $C_{60}$-doped NPD-$C_{60}$ film as a HTL, the current density and luminance of multi-layered ITO/PEDOT-PSS/NPD-$C_{60}/Alq_3$/LiF/Al device were significantly increased by about 80% and its efficiency was improved by about 25% in this study.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.36C no.10
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• pp.17-28
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• 1999

In this paper, an ASIC emulation system called ACE (ASIC Emulator) is proposed. It can produce the prototype of target ASIC in a short time and verify the function of ASIC circuit immediately The ACE is consist of emulation software in which there are EDIF reader, library translator, technology mapper, circuit partitioner and LDF generator and emulation hardware including emulation board and logic analyzer. Technology mapping is consist of three steps such as circuit partitioning and extraction of logic function, minimization of logic function and grouping of logic function. During those procedures, the number of basic logic blocks and maximum levels are minimized by making the output to be assigned in a same block sharing product-terms and input variables as much as possible. Circuit partitioner obtain chip-level netlists satisfying some constraints on routing structure of emulation board as well as the architecture of FPGA chip. A new partitioning algorithm whose objective function is the minimization of the number of interconnections among FPGA chips and among group of FPGA chips is proposed. The routing structure of emulation board take the advantage of complete graph and partial crossbar structure in order to minimize the interconnection delay between FPGA chips regardless of circuit size. logic analyzer display the waveform of probing signal on PC monitor that is designated by user. In order to evaluate the performance of the proposed emulation system, video Quad-splitter, one of the commercial ASIC, is implemented on the emulation board. Experimental results show that it is operated in the real time of 14.3MHz and functioned perfectly.

• Journal of the Korean earth science society
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• v.37 no.1
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• pp.52-61
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• 2016

The purpose of the study was to create a probabilistic seismic hazard map using the input data that reflected the seismo-tectonic characteristics of the Korean Peninsula by applying USGS program (Harmsen (2008). The program was partly modified for the purpose of this study. The uncertainty of input parameters given by specialists was reflected in calculating the seismic hazard values by logic tree method. The general pattern of PGA was quite sensitive and similar to the shape of areal source. The probabilistic seismic hazard map showed the contour distribution of peak acceleration (%g) with 10% probability of exceedance in 5, 10, 20, 50, 100, 250, and 500 years. The result showed that the peak ground acceleration (PGA) values of the northern peninsula were almost half values of the southern peninsula except Hwanghae province. The general trend of the hazard map extended in the direction of NW-SE from Whanghae province to south-eastern regions of the peninsula. The values in northern part of Kangwon province were relatively lower than other areas in the southern peninsula. The maps produced through this study are considered valuable in regulating the seismic safety of the major facilities in the Korean Peninsula.

• The Journal of The Korea Institute of Intelligent Transport Systems
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• v.2 no.1 s.2
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• pp.1-13
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• 2003

This International Standard establishes an AVI/AEI System based on radio frequency technologies. This system is intended for general application in ITS. Specially, It allows the transfer of the identification codes and further information about equipment and vehicles used in intermodal transport into such CVO and information systems related to Intermodal Transport processes. The aim of this standard is to define, describe and specify Architecture, System Parameters, Numbering/ Data structures and interface related to an AVI/AEI system to provide an enabling Standard, which, whilst allowing the system specifier to determine the performance levels and operating conditions, provides a framework for nominal interoperability. The Standard is to establish a common framework to achieve unambiguous identification in AVI/AEI applications. Thes is AVI/AEI is designed to be an 'enabling' structure to allow interoperability between different commercial systems, and not prescriptive in determining any one system. The ISO TC204 WG4 has eight active work items. A new WI on ERI is progressing quickly; three WIs for the road environment and four multimodal WIs are under development. All Work Items are joint between CEN TC278 and ISO TC204 according to the Vienna Agreement, with CEN in the lead. The work is progressing with some delay. For all the work items, the countries who have appointed experts we: Australia, Austria, Belgium, Canada, Czech, Denmark France, Germany, Japan, Korea, the Netherlands, Norway, Spain, Sweden, UK and USA. There are 30 registered experts. The study focus on the AVI/AEcl standardization and developing of the Korea standard

• Journal of the Korean Institute of Telematics and Electronics D
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• v.36D no.5
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• pp.11-20
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• 1999

The data transfer width between the mocroprocessor and the memory comes to a critical part that limits system performance since the data transfer width has been as it was while the performance of a microprocessor is getting higher due to its continuous development in speed. And it is important that the memory should be in small size for the reduction of embedded microprocessor's price which is integrated on a single chip with the memory and IO circuit. In this paper, a mocroprocessor tentatively named as Extendable Instruction Set Computer(EISC) is proposed as the high code density 32 bit mocroprocessor architecture. The 32 bit EISC has 16 general purpose registers and 16 bit fixed length instruction which has the short length offset and small immediate operand. By using and extend register and extend flag, the offset and immediate operand could be extended. The proposed 32 bit EISC is implemented with an FPGA and all of its functions have been tested and verified at 1.8432MHz. And the cross assembler, the cross C/C++ compiler and the instruction simulator of the 32 bit EISC shows 140-220% and 120-140% higher code density than RISC and CISC respectively, which is much higher than any other traditional architectures. As a consequence, the EISC is suitable for the next generation computer architecture since it requires less data transfer width compared to any other ones. And its lower memory requirement will embedded microprocessor more useful.