• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.8
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• pp.113-118
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• 2016

In this paper, a read-in integrated circuit (RIIC) for IR scene projectors (IRSPs) adopting a sub-frame control technique is proposed, which minimizes the reduction of the apparent temperature of the IR images projected from IRSPs operating at a frame rate of 30 Hz. The proposed sub-frame control technique significantly reduces the amount of scene data loss on capacitors, which is caused by leakage currents flowing through MOSFET switches during holding periods, by dividing a unit frame into 8 sub-frames and refreshing the same scene data for each sub-frame. A current-drive RIIC was designed for the higher apparent temperature of IR radiated from the emitter, and it receives the scene data as a form of analog voltages from an external DAC. A prototype chip with a $64{\times}32$ RIIC array was fabricated using Magnachip/SKhynix $0.35{\mu}m$ 2-poly 4-metal CMOS process, and the measured maximum output data current is $230.3{\mu}A$. This amount of current ensures the projection of IR images whose maximum apparent temperature is $366.2^{\circ}C$ in the mid-wavelength IR (MWIR) when applied to a prototype emitter having a resistance of $15k{\Omega}$.

• Journal of IKEEE
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• v.25 no.1
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• pp.156-167
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• 2021

In this paper, we propose a digital transceiver unit design for in-building of 5G optical repeaters that extends the coverage of 5G mobile communication network services and connects to a stable wireless network in a building. The digital transceiver unit for driving the proposed 5G optical repeater is composed of 4 blocks: a signal processing unit, an RF transceiver unit, an optical input/output unit, and a clock generation unit. The signal processing unit plays an important role, such as a combination of a basic operation of the CPRI interface, a 4-channel antenna signal, and response to external control commands. It also transmits and receives high-quality IQ data through the JESD204B interface. CFR and DPD blocks operate to protect the power amplifier. The RF transmitter/receiver converts the RF signal received from the antenna to AD, is transmitted to the signal processing unit through the JESD204B interface, and DA converts the digital signal transmitted from the signal processing unit to the JESD204B interface and transmits the RF signal to the antenna. The optical input/output unit converts an electric signal into an optical signal and transmits it, and converts the optical signal into an electric signal and receives it. The clock generator suppresses jitter of the synchronous clock supplied from the CPRI interface of the optical input/output unit, and supplies a stable synchronous clock to the signal processing unit and the RF transceiver. Before CPRI connection, a local clock is supplied to operate in a CPRI connection ready state. XCZU9CG-2FFVC900I of Xilinx's MPSoC series was used to evaluate the accuracy of the digital transceiver unit for driving the 5G optical repeater proposed in this paper, and Vivado 2018.3 was used as the design tool. The 5G optical repeater digital transceiver unit proposed in this paper converts the 5G RF signal input to the ADC into digital and transmits it to the JIG through CPRI and outputs the downlink data signal received from the JIG through the CPRI to the DAC. And evaluated the performance. The experimental results showed that flatness, Return Loss, Channel Power, ACLR, EVM, Frequency Error, etc. exceeded the target set value.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.22 no.11
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• pp.1034-1046
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• 2011

In this paper, a design and fabrication of 40 W power amplifier for the X-band using load-pull measurement of GaN HEMT chip are presented. The adopted active device for power amplifier is GaN HEMT chip of TriQuint company, which is recently released. Pre-matched fixtures are designed in test jig, because the impedance range of load-pull tuner is limited at measuring frequency. Essentially required 2-port S-parameters of the fixtures for extraction optimal input and output impedances is obtained by the presented newly method. The method is verified in comparison of the extracted optimal impedances with data sheet. The impedance matching circuit for power amplifier is designed based on EM co-simulation using the optimal impedances. The fabricated power amplifier with 15${\times}$17.8 $mm^2$ shows the efficiency above 35 %, the power gain of 8.7~8.3 dB and the output power of 46.7~46.3 dBm at 9~9.5 GHz with pulsed-driving width of 10 usec and duty of 10 %.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.19 no.9
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• pp.2197-2204
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• 2015

In recent times, the high-tech society has become the most important issue by IT technology and publication network. Today such flows have also been the case in the e-book field. Today's electronic publication is changing day by day. But there are some problems according to the prevalence of e-book. E-book is similar to p-book(paper-book). There is a limit to have perfect feeling of a texture of p-book. In order to purchase an e-book, people use online. People having malicious intent could copy and distribute it illegally. It leads to cyber abuses. This paper aims at the copyright protection of e-book ePub writers. The proposed e-book copyright protection system is designed using e-book production Sigil environment and C program environment. This system uses client-server communication through e-book ePub as authentication information. It discerns whether to permit or not for a client to read the e-book using authentication information. Authentication information includes ID, password, IP address, limited time of authentication information, GUID(Globally Unique Identifier). If authentication information about e-book meets requirements, people can use it. But if not, it blocks people's approach by quitting program.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.43 no.11 s.353
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• pp.175-184
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• 2006

In this paper, we describe a 900MHz CMOS RF transceiver using an ISM band for ZigBee applications. The architecture of the designed rx front-end, which consists of a low noise amplifier, a down-mixer, a programmable gain amplifier and a band pass filter. And the tx front-end, which consists of a band pass filter, a programmable gain amplifier, an up-mixer and a drive amplifier. A low-if topology is adapted for transceiver architecture, and the total current consumption is reduced by using a low power topology. Entire transceiver is verified by means of post-layout simulation and is implemented in 0.18um RF CMOS technology. The fabricated chip demonstrate the measured results of -92dBm minimum rx input level and 0dBm maximum tx output level. Entire power consumption is 32mW(@1.8VDD). Die area is $2.3mm{\times}2.5mm$ including ESD protection diode pads.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.6
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• pp.35-42
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• 2010

This paper describes a 10 bit 80MHz CMOS D/A converter for wireless communication system. The proposed circuit in the paper is implemented with a $0.18{\mu}m$ CMOS n-well 1-poly 6-metal process. The architecture of the circuit consists of the 4bit LSB with binary decoder, and both the 3bit ULSB and the 3bit MSB with the thermometer decoder. The measurement results demonstrates SFDR of 60.42dBc at sampling frequency 80MHz, input frequency 1MHz and ENOB of 8.75bit. INL and DNL have been measured to be ${\pm}$0.38LSB and ${\pm}$0.32LSB and glitch energy is measured to be 4.6$pV{\cdot}s$. Total power dissipation is 48mW at 80MHz(maximum sampling frequency) with a single power supply of 1.8V.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2003.05a
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• pp.132-137
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• 2003

This performance is motivated to develop a tracking antenna system for receive the satellite broadcasting signal in the coast sailing ship. Therefore, this system is made to small size, light weight and simple operation which is must to low cost system for popularization of small size ship and adaptive possibilities with useful on a ship in the coast using 1 axis Az-mount. The antenna mount structure is a compact size and easy operation to the Az-axis type which is operated by step motor. The antenna unit is a domestic made plate type of patch array and ship's moving detection is using the gyro sensor for ship's moving control. We are designed to algorithm, which walking is abreast for step track and ship's moving compensation. Ship's moving compensation is adapted to the closed loop control method by detection from gyro sensor. This system is consisted of micro processor, ADC, comparative amplifier, step motor driver, mount mechanism and algorithm. We have analysised the tracking performance of prototype on sailing ship board.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.7 no.4
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• pp.812-818
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• 2003

This paper presents a developed outside rotor type induction motor for the fan. Nearly all of the induction motors consist of two parts, rotor and stator, and the position of rotor is generally inside of stator. However, the rotor of the developed induction motor is located outside of stator. It is believed that the outside rotor type induction motor is suitable for the fan due to its large inertia, that is, it is considered that the change of air flow rate resulting from input power or load fluctuation is reduced. In this paper, the two tests which are suitable to obtain the electrical parameters of the outside rotor type induction motor were described, then various parameters of outside rotor type induction motor were measured. These are the locked rotor test and no load test. By using these tests, it was possible to determine the parameters which are presented in the steady-state equivalent-circuit of the outside rotor type induction motor. Load test of induction motor was carried out using a dynamometer and the torque-speed curve was obtained. It is believed that the results of this paper can be used for the development of the outside rotor type induction motor.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.9
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• pp.1-7
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• 2008

This paper proposes 3.3V input and 1.8V output voltage mode step-down DC-DC buck converter for wireless mobile system which is designed in a standard 0.35$\mu$m CMOS process. The proposed capacitor multiplier method can minimize error amplifier compensation block size by 30%. It allows the compensation block of DC-DC converter be easily integrated on a chip. Also, we improve efficiency to 3% using low power buffer. Measurement result shows that the circuit has less than 1.17% output ripple voltage and maximum 83.9% power efficiency.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.7 no.6
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• pp.1130-1137
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• 2003

This performance is motivated to develop a tracking antenna system for receive the satellite broadcasting signal in the coast sailing ship. Therefore, this system is made to small size, light weight and simple operation which is must to low cost system for popularization of small size ship and adaptive possibilities with useful on a ship in the coast using 1 axis Az-mount. The antenna mount structure is a compact size and easy operation to the Az-axis type which is operated by step motor. The antenna unit is a domestic made plate type of patch array and ship's moving detection is using the gyro sensor for ship's moving control. We are designed to algorithm, which walking is abreast for step track and ship's moving compensation. Ship's moving compensation is adapted to the closed loop control method by detection from gyro sensor. This system is consisted of micro processor, ADC, comparative amplifier, step motor driver, mount mechanism and algorithm. We have analysised the tracking performance of prototype on sailing ship board.