• Title/Summary/Keyword: 고장점표정

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A Fault Location Algorithm for a Single Line Ground Fault on a Multi-Terminal Transmission Line (다단자 송전계통에서의 1선지락 고장시 고장점 표정 알고리즘)

  • 강상희;노재근;권영진
    • The Transactions of the Korean Institute of Electrical Engineers A
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    • v.52 no.2
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    • pp.121-133
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    • 2003
  • This paper presents a fault location algorithm for a single phase-to-ground fault on 3-terminal transmission systems. The method uses only the local end voltage and current signals. Other currents used for the algorithm are estimated by current distribution factors and the local end current. Negative sequence current is used to remove the effect of load current. Five distance equations based on Kirchhoff's voltage law are established for the location algorithm which can be applied to a parallel transmission line having a teed circuit. Separating the real and imaginary parts of each distance equation, final nonlinear equations that are functions of the fault location can be obtained. The Newton-Raphson method is then applied to calculate the estimated fault location. Among the solutions, a correct fault distance is selected by the conditions of the existence of solution. With the results of extensive S/W and H/W simulation tests, it was verified that the proposed algorithm can estimate an accurate fault distance in a 154kV model system.

D.C. Power system Failure Point Informing Device Development of Face Trial for the Site Installation (직류급전시스템 고장점표정장치 개발을 위한 현장시범 설치)

  • Kim, Youn-Sik;Kim, Yong-Duk;Ha, Tae-Yoo;Han, Moon-Seob;Park, Jong-Gook;Im, Hyeong-Gil
    • Proceedings of the KSR Conference
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    • 2011.10a
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    • pp.2011-2014
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    • 2011
  • A "failure point informing device" is that if a accident of short or ground occurs in electric railway it inform us of the distance to accident point. SeoulMetro, KRRI, 2ISYS have developed this device and installed in line no.4 substation Iy-Chon, Sam-Gakgi to test its performance. A line resistance will be measured to test this device in November.

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A Study on Digital Fault Locator for Transmission Line (송전선로용 디지털 고장점 표정장치에 관한 연구)

  • Lee, Kyung-Min;Park, Chul-Won
    • The Transactions of the Korean Institute of Electrical Engineers P
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    • v.64 no.4
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    • pp.291-296
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    • 2015
  • Transmission line is exposed to a large area, and then faults are likely to occur than the other component of power system. When a fault occurs on a transmission line, fault locator helps fast recovery of power supply on power system. This paper deals with the design of a digital fault locator for improvement accuracy of the fault distance estimation and a fault occurrence position for transmission line. The algorithm of a fault locator uses a DC offset removal filter and DFT filter. The algorithm utilizes a fault data of GPS time synchronized. The computed fault information is transmitted to the other side substation through communication. The digital fault locator includes MPU module, ADPU module, SIU module, and a power module. The MMI firmware and software of the fault locator was implemented.

A Using Study for Fault Locator Algorithm of Distribution System (배전계통 고장점 표정 알고리즘 적용 연구)

  • Lee, Sung-Woo;Ha, Bok-Nam
    • Proceedings of the KIEE Conference
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    • 2009.07a
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    • pp.74_76
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    • 2009
  • This paper presents a discrete wavelet analysis based algorithm to address the fault impedance calculation under transient state in radial power distribution networks. The fault impedances have been derived under different fault conditions. Furthermore, a recursive fault distance estimation method is proposed utilizing the measured fault impedance and power line parameters. The proposed scheme can resolve the errors caused by the non-homogeneous power lines, the presence of lateral loads since, the fault impedance will always be updated with the recursive form. For the verification of the proposed scheme, a filed test has been peformed with varying fault resistances in the 22.9(kV) radial system. Power meters and fault locators were installed at the substation. It was figured out that the performance of the discrete wavelet and the recursive scheme are very good even for high fault resistance condition.

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Fault Location Identification Using Software Fault Tolerance Technique (소프트웨어 Fault Tolerance를 이용한 고장점 표정)

  • Kim Wonha;Jang Yong-Won;Han Seung-Soo
    • The Transactions of the Korean Institute of Electrical Engineers A
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    • v.54 no.2
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    • pp.73-78
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    • 2005
  • The management of technological systems will become increasingly complex. Safe and reliable software operation is a significant requirement for many types of system. So, with software fault tolerance, we want to prevent failures by tolerating faults whose occurrences are known when errors are detected. This paper presents a fault location algorithm for single-phase-to-ground faults on the teed circuit of a parallel transmission line using software fault tolerance technique. To find the fault location of transmission line, we have to solve the 3rd order transmission line equation. A significant improvement in the identification of the fault location was accomplished using the N-Version Programming (NVP) design paradigm. The delivered new algorithm has been tested with the simulation data obtained from the versatile EMTP simulator.

Parallel Transmission Lines Fault location Algorithm for single line-to-ground fault (평형 2회선 송전 계통의 1선지락시 고장점 표정 알고리즘)

  • Yang, Xia;Choi, Myeon-Song;Lee, Seung-Jae
    • Proceedings of the KIEE Conference
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    • 2006.11a
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    • pp.317-319
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    • 2006
  • This paper proposes a fault location algorithm for two-parallel transmission line in the case of single line-to-ground fault Proposed algorithm is using voltage and current measured in the sending-end. The fault distance is simply determined by solving a second order polynomial equation due to the direct circuit analysis. The simulations by PSCAD/EMTDC have demonstrated the accuracy and effectiveness of the proposed algorithm.

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A Fault Location Algorithm for a Transmission Line Using Travelling Waves (진행파를 이용한 송전선로의 고장점 표정 알고리즘)

  • Kang Sang-Hee;Kim Jin-Han
    • The Transactions of the Korean Institute of Electrical Engineers A
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    • v.53 no.10
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    • pp.542-549
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    • 2004
  • The conventional fault location algorithms based on the travelling waves have an inherent problem. In cases of the close-up faults occurring near the relaying point and of the faults having zero degree inception angle of voltage signals, the conventional algorithms can not estimate an accurate fault distance. It is because the shapes of travelling waves are near sinusoidal in those cases. A new method solving this problem is presented in this paper. An FIR(Finite Impulse response) filter which makes high frequency components prominent and makes the power frequency component and dc-offset attenuated is used. With this method, the cross-correlation peak is to be very clear when a close-up fault or a fault having near zero-degree inception angle occurs. The cross-correlation peaks can be clearly distinguished and accurate fault location is practically possible consequently. A series of simulation studies using EMTP(Electromagnetic Transients Program) show that the proposed algorithm can calculate an accurate fault distance having maximum 2% or less error.

Fault Location Algorithm with Ground Capacitance Compensation for Long Parallel Transmission Line (장거리 병렬 송전선로용 대지 정전용량 보상에 의한 고장점 표정 알고리즘)

  • Park, Chul-Won;Kim, Sam-Ryong;Shin, Myong-Chul
    • The Transactions of the Korean Institute of Electrical Engineers P
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    • v.54 no.4
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    • pp.163-170
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    • 2005
  • This paper deals with an improved fault location algorithm with compensation ground capacitance through distributed parameter for a long parallel T/L. For the purpose of fault locating algorithm non-influenced by source impedance and fault resistance, the loop method was used in the system modeling analysis. This algorithm uses a positive and negative sequence of the fault current for high accuracy of fault locating calculation. Power system model of 160km and 300km long parallel T/L was simulated using EMTP software. To evaluate of the proposed algorithm, we used the several different cases 64 sampled data per cycle. The test results show that the proposed algorithm was minimized the error factor and speed of fault location estimation.

An Algorithm of fault Location Technique for Long Transmission Line (송전선로의 고장점 표정 알고리즘)

  • Park, C.W.;Kim, S.R.;Shin, M.C.;Nam, S.B.;Lee, B.K.
    • Proceedings of the KIEE Conference
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    • 2002.07a
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    • pp.145-147
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    • 2002
  • In this paper, the improved fault locating method using distributed parameter which calculating the reduced voltage and current according to the ground capacitance in long transmission line was proposed. For the purpose of the fault locating algorithm non influenced source impedance, the loop method was used in the system modeling analysis. To enhance the fault locating, zero sequence of the fault current which is variable according to ground capacitance was not used but positive and negative sequence. System model was simulated using EMTP software. To verify the accuracy of proposed method, in different cases 64 sampled data per cycle was used and 160km and 300km long transmission line has fault resistance $0{\Omega}\;and\;100{\Omega}$ respectively was compared.

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A fault location algorithm for distribution feeder systems (배전선로 고장점 표정 알고리즘)

  • Lee, D.S.;Jin, B.G.;Lee, S.J.;Kang, S.H.;Choi, M.S.;Ahn, B.S.;Yoon, N.S.
    • Proceedings of the KIEE Conference
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    • 2001.05a
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    • pp.251-253
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    • 2001
  • This paper presents a fault location algorithm for distribution feeder systems. Distribution feeders include single phase and three phase laterals. The proposed algorithm achieves a high accuracy by continuously updating voltage and current phasor using the symmetrical components and admittance load model.

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