• Journal of Internet Computing and Services
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• v.14 no.4
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• pp.25-33
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• 2013

The procedure of the arbitration which is the tag collision is essential because the multiple tags response simultaneously in the same frequency to the request of the Reader. This procedure is known as Anti-collision and it is a key technology in the RFID system. In this paper, we propose the 4-Bit Pattern Slot Allocation(4-BPSA) algorithm for the high-speed identification of the multiple tags. The proposed algorithm is based on the tree algorithm using the time slot and identify the tag quickly and efficiently through accurate prediction using the a slot as a 4-bit pattern according to the slot allocation scheme. Through mathematical performance analysis, We proved that the 4-BPSA is an O(n) algorithm by analyzing the worst-case time complexity and the performance of the 4-BPSA is improved compared to existing algorithms. In addition, we verified that the 4-BPSA is performed the average 0.7 times the query per the Tag through MATLAB simulation experiments with performance evaluation of the algorithm and the 4-BPSA ensure stable performance regardless of the number of the tags.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.18 no.6
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• pp.1407-1412
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• 2014

In order to improve spectrum sensitivity of photodiode for detection of the laser at 850 nm ~ 1000 nm of near-infrared wavelength band, this study has produced silicon-based fast film PIN photodiode and analyzed electrical and optical properties. The manufactured device is packaged in TO-18 type. The electrical properties of the dark currents both Anode 1 and Anode 2 have valued of approximately 0.055 nA for 5 V reverse bias, while the capacitance showed 19.5 pF at frequency range of 1 kHz and about 19.8 pF at the range of 200 kHz for 0 V. In addition, the rising time of output signal was verified to have fast response time of about 30 ns for 10 V. For the optical properties, the best spectrum sensitivity was 0.66 A/W for 880 nm, while it was relatively excellent value of 0.45 A/W for 1,000 nm.

• Journal of KIISE:Computer Systems and Theory
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• v.31 no.11
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• pp.626-634
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• 2004

In a client-server model, network server systems suffer from both heavy communication and computational loads. While communication channels become increasingly speedy, the existing protocol stack architectures still include mainly three performance bottlenecks of protocol stack processing, system call, and network interrupt overheads. To address these obstacles, in this paper we present a host-independent network system where a network interface card (NIC) is utilized in an efficient manner. First, by offloading network-related portion to the NIC, the host can fully utilize its processing power for other useful purposes. Second, it eliminates the system call overhead, such as context-switching and memory copy operations, since the host communicates with the NIC through its user-level libraries. Third, it a] so reduces the network interrupt operation count as the host handles the interrupt in a segment instead of a packet. The experimental results show that the proposed network system reduces the host CPU overhead for communication system by 68-71%. It also shows that the proposed system improves the communication speed by 11-83% under heavy computational and communication load conditions.