• The Journal of Korean Institute of Communications and Information Sciences
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• v.35 no.6C
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• pp.516-522
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• 2010

In this paper, the carrier frequency offset estimator is proposed for the China multimedia mobile broadcasting (CMMB). The fractional carrier frequency offset is estimated by utilizing the cyclic prefix in each CMMB symbol. In addition, the integer carrier frequency offset can be estimated with the synchronization signal in every CMMB frame. The proposed estimator is the most suitable for the frame structure of CMMB. It shows a prominent performance even in timing offset and multipath conditions.

• Proceedings of the Korean Institute of Communication Sciences Conference
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• 2004.07a
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• pp.196-196
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• 2004

• The Journal of Korean Institute of Communications and Information Sciences
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• v.24 no.9A
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• pp.1401-1410
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• 1999

In this paper, we propose a fast block matching algorithm using the lower and upper bound of mean absolute difference (MAD) which is calculated at the search region overlapped with neighbor blocks. At first, we calculate the lower bound of MAD and reduce the search point by using this lower bound. In this method, we can get good prediction error performance close to full search block matching algorithm (FSBMA), but there exists some computational complexity that has to be reduced. Therefore, we further reduce the computational complexity by using pixel subsampling besides the lower and upper bound of MAD. Experimental results show that we can remarkably reduce the computational complexity with good prediction error performance close to FSBMA.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.37 no.3
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• pp.41-56
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• 2000

In this paper, we propose a two-stage fast block matching algorithm using the mean absolute error (MAE) of neighbor search point that can reduce the computational complexity to estimate motion vector while the motion estimation error performance is nearly the same as full search algorithm (FSA) In the proposed method, the lower bound of MAE 6at current search point IS calculated using the MAE of neighbor search point And we reduce the computational complexity by performing the block matching process only at the search point that has to be block matched using the lower bound of MAE The proposed algorithm is composed of two stages The experimental results show that the proposed method drastically reduces the computational complexity while the motion compensated error performance is nearly kept same as that of FSA.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.33 no.1C
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• pp.19-33
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• 2008

A method that is adaptively selecting among previous fast motion estimation algorithms and a newly proposed fast motion estimation algorithm(UCDS) is presented in this paper. The algorithm named AUDC and a newly proposed fast motion estimation algorithms are based on the Diamond Search(DS) algorithm and Three Step Search(TSS). Although many previous fast motion estimation algorithms have lots of advantages, those have lots of disadvantages. So we thought better adaptive selection of fast motion estimation algorithms than only using one fast motion estimation algorithm. Therefore, we propose AUDC that is using length of the MV, Search Point, SAD of the neighboring block and adaptively selecting among Cross Three Step Search(CTSS), Diamond Search(DS) and Ungraded Cross Diamond Search(UCDS). Experimental results show that the AUDC is much more robust, provides a faster searching speed, and smaller distortions than other popular fast block-matching at algorithms.

• Annual Conference of KIPS
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• 2000.10a
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• pp.805-808
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• 2000

통신망의 급격한 발전과 통신 속도의 향상에 따라 암호 알고리듬의 고속화 필요성이 절실하다. 본 논문에서는 LFSR을 고속화하기 위하여 한 클럭에 m번의 이동이 이루어지는 고속형 HS-LFSR을 제안하였고, 이를 기본으로 다수의 키 수열 발생기를 병렬 연결하여 속도를 개선시킨 병렬형 스트림암호를 제안하였다. 그리고 병렬형 스트림 암호 예로서 m-병렬 합산 수열 발생기(m-parallel SUM-BSG)를 제안하여 m = 8인 병렬 발생기를 세부 설계 예시하였으며, 제안된 발생기는 기존의 비도 수준을 유지하면서 처리 속도를 m배 높일 수 있음을 확인하였다.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.37 no.7
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• pp.50-57
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• 2000

We propose a logic synthesis algorithm for the design of FPGAs operating at high speed. FPGA is a novel technology that provides programmability in the field. Because of short turnaround time and low manufacturing cost, FPGA has been noticed as an ideal device for system prototyping. Despite these merits, FPGA has drawbacks, namely low integration and long delay time comparing to ASIC. The proposed algorithm partitions a given circuit into subcircuits utilizing a kernel divisor such that the subcircuits can be performed at the same time, hence reducing the delay of the circuit. Experimental results on the MCNC benchmark show that the proposed algorithm is effective by generating circuits having 19.1% les delay on average, when compared to the FlowMap algorithm.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.39 no.2
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• pp.87-95
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• 2002

In this paper, we proposed a fast multi-resolution motion estimation(MRME) algorithm. This algorithm exploits the half-pixel accuracy motion estimation(HPAME) for exact motion vectors in the baseband and block classification for the reduction of bit amounts and computational loads. Generally, as the motion vector in the baseband are used as initial motion vector in the high frequency subbands, it has crucial effect on quality of the motion compensated image. For this reason, we exploit HPAME in the motion estimation for the baseband. But HPAME requires additional bit and computational loads so that we use block classification for the selective motion estimation in the high frequency subbands to compensate these problems. In result, we could reduce the bit rate and computational load at the similar image quality with conventional MRME. The superiority of the proposed algorithm was confirmed by the computer simulation.

• Proceedings of the Korean Society of Broadcast Engineers Conference
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• 2010.11a
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• pp.244-247
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• 2010

현대 사회에서 영상 콘텐츠 (contents)의 사용량이 급증함에 따라 영상압축 기술은 이동통신이나 DMB 등의 시스템에 필수적인 기술이 되었으며 이에 따라 MPEG-x와 H.26x 등 국제적인 표준들이 존재한다. 전역 탐색 알고리듬은 주어진 검색 범위(search range) 내에서 모든 후보들의 변위의 에러 기준에 따라 최솟값을 이용해 위치를 검색하는 알고리듬이다. 그러나 전역 탐색 알고리듬은 각 화소에 대해 엄청난 양의 계산 로드를 가지며 이로 인해 심각한 문제를 발생시키는 단점이 있다. 1비트 변환 (one-bit transform) 을 이용한 고속 움직임 추정 알고리듬은 참조 프레임과 현재 프레임을 1비트, 즉 0 또는 1만 갖는 값으로 변환하는데, 이에는 exclusive-OR 연산을 통해 블록 매칭 에러 (block matching error)를 계산하는 과정과 변환하는 과정이 포함된다. 본 논문에서는 다양한 커널 (kernel)들을 이용한 1비트 변환과 움직임 추정에 대해 다루었으며, 기존에 있었던 1비트 변환에 이용된 커널과는 다른 다양한 커널을 이용한 움직임 추정 결과들을 비교해봄으로써 화질열화를 최소로 하는 커널을 찾는 것에 대해 연구했다.

• Proceedings of the Korean Society of Broadcast Engineers Conference
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• 2010.11a
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• pp.229-232
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• 2010

비디오 압축 기법에서 움직임 추정(Motion Estimation)은 매우 중요한 부분을 차지하는데, 그것은 움직임 추정이 화질과 인코딩 시간에 직접적으로 영향을 미치기 때문이다. 가장 기본적인 움직임 추정 기법은 전역 탐색 기법(Full Search)인데, 이는 가장 좋은 화질을 보여주긴 하지만 매우 많은 계산량이 필요하다는 단점이 있다. 따라서 좋은 화질을 유지하면서도 계산량을 낮추기 위한 많은 고속 탐색 알고리즘들이 제안되었다. 이 논문에서는 현재 프레임의 매크로블록과 이전프레임의 매크로블록간의 Sum of Absolute Difference를 이용하여 탐색영역을 변경하는 새로운 예측 방법을 제시한다. 실험결과에 따르면 우리가 제안한 알고리듬은 FS와 비슷한 PSNR을 유지하면서 속도가 크게 향상된 것을 볼 수 있었다.