• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.37 no.5B
• /
• pp.348-356
• /
• 2012

The application traffic analysis is getting more and more challenging due to the huge amount of traffic from high-speed network link and variety of applications running on wired and wireless Internet devices. Multi-level combination of various analysis methods is desired to achieve high completeness and accuracy of analysis results for a real-time analysis system, while requires much of processing burden on the contrary. This paper proposes a novel architecture for a real-time traffic analysis system which improves the processing performance on multi-core CPU environment. The main contribution of the proposed architecture is an efficient parallel processing mechanism with multiple threads of various analysis methods. The feasibility of the proposed architecture was proved by implementing and deploying it on our campus network.

• Journal of the Korean Institute of Telematics and Electronics C
• /
• v.36C no.9
• /
• pp.1-12
• /
• 1999

In this paper, we designed an embedded processor with 128Kbytes EPROM and 4Kbytes SRAM based on GMS30C2132 which RISC processor with DSP functions. And a new architecture of bus sharing to control the embedded memory and external memory unit i proposed aiming at one-cycle access between memories and CPU. For embedded 128Kbytes EPROM, we designed the new expansion interface for data size at data ordering with memory organization and the efficient interface for test. The embedded SRAM supports an extended stack area high speed DSP operation, instruction cache and variable data-length control which is accessed with 4K modulo addressing schemes. The proposed new architecture and circuits reduced the memory access cycle time from 40ns and improved operation speed 2-times for program benchmark test. The chip is occupied $108.68mm^2$ using $0.6{\mu}m$ CMOS technology.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.47 no.2
• /
• pp.60-67
• /
• 2010

We designed Average Current Control PFC IC which has make the average value of boost inductor current became the shape of sine wave. Designed IC has fixed frequency of 75kHz to meet EMI standard requirement. And also RC compensation loop has been designed into the error amp and the current amp, in order that it has wide bandwidth for high speed control. And we use the oscillator which generates by square wave and triangle wave, and add to UVLO, OVP, OCP, TSD which is in order to operate stability. We simulated by using Spectre of Cadence to verify the unity power factor function and various protection circuits and fabricated in a $1{\mu}m$ High Voltage(20V) CMOS process.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.26 no.11A
• /
• pp.1820-1826
• /
• 2001

In this paper, we present a modeling scheme for the already-installed two-wire home phone lines with arbitrary topologies and show that the inter-symbol interference due to the topology can be removed using an adaptive equalizer. The transmission characteristics of the arbitrary-configured two-wire home phone lines can be analyzed through the ABCD matrices. The simulation result shows that the impedance mismatch due to the branch lines renders nulls in the frequency response or delayed pulses in the impulse response. These nulls or delayed pulses cause inter-symbol interference that inhibits correct signal detection. An adaptive equalizer is shown to be effective in eliminating the interference. Also, the simulation result shows that the equalizer converges in 1.5 ms at a data rate of 1 Msps at signal-to-noise ratios greater than 15 dB. In addition, from the result of relation between E$\_$b//N$\_$and BER(Bit Error Rate), we can see that E$\_$b//N$\_$o/ more than 19 dB is required for the data communication with a BER less than 10$\^$-5/.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.27 no.7C
• /
• pp.677-684
• /
• 2002

Today's Internet does not have efficient traffic engineering mechanism to support QoS for the explosive increasing internet traffic such as various multimedia traffic. This functional shortage degrades prominently the quality of service, and makes it difficult to provide multi-media service and real-time service. Various technologies are under developed to solve these problems. IETF (Internet Engineering Task Force) developed the MPLS (Multi-Protocol Label Switching) technology that provides a good capabilities of traffic engineering and is independent layer 2 protocol, so MPLS is expected to be used in the Internet backbone network$\^$[1][2]/. The faults occurring in high-speed network such as MPLS, may cause massive data loss and degrade quality of service. So fast network restoration function is essential requirement. Because MPLS is independent to layer 2 protocol, the fault detection and reporting mechanism for restoration should also be independent to layer 2 protocol. In this paper, we present the experimental results of the MPLS OAM function for the performance monitoring and fault detection 'll'&'ll' notification, localization in MPLS network, based on the OPNET network simulator

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.25 no.9A
• /
• pp.1395-1404
• /
• 2000

In this paper, we propose a heuristic wavelength routing algorithm for IP datagrams in WDM (Wavelength-Division Multiplexing) networks which operates in a distributed manner, while most previous works have focused centralized algorithms. We first present an efficient construction method for a loose virtual topology with a connectivity property, which reserves a few wavelength to cope with dynamic traffic demands properly. This connectivity property assures that data from any source node could reach any destination node by hopping one or multiple lightpaths. We then develop a high-speed distributed wavelength routing algorithm adaptive to dynamic traffic demands by using such a loose virtual topology and derive the general bounds on average utilization in the distributed wavelength routing algorithms. Finally, we show that the performance of the proposed algorithms is better than that of the FSP(Fixed Shortest-Path) wavelength routing algorithms through simulation using the NSFNET[1] and a dynamic hot-spot traffic model, and that the algorithms is a good candidate in distributed WDM networks in terms of the blocking performance, the control traffic overhead, and the computation complexity.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.27 no.6C
• /
• pp.601-609
• /
• 2002

The efficient Viterbi decoder that supports full data-rate output of DAB system was proposed. Viterbi decoder consumes lots of computational load and should be designed to be fast specific hardware. In this paper, SST scheme was adopted for Viterbi decoder with puncturing to reduced the power consumption. Puncturing vector tables are modified and re-arranged to be designed by a hardwired logic to save the system area. New re-scaling scheme which uses the fact that the difference of the maximum and minimum of the path metric values is bounded is proposed. The proposed re-scaling scheme optimizes the wordlength of path metric memory and greatly reduces the computational load for re-scaling by controlling MSB of path metric memory. Another saving of computation is done by proposed algorithm for branch metric calculation, which makes use of pre-calculated metric values. The designed Viterbi decoder was synthesized using SAMSUNG 0.35$\mu$ standard cell library and occupied small area and showed lower power consumption.

• The Transactions of The Korean Institute of Electrical Engineers
• /
• v.62 no.1
• /
• pp.143-148
• /
• 2013

When the fault occurs in power system, the fault-current exceeds breaking capacity of the circuit breaker. So, reliablity of the power system is decreased sharply. Superconducting fault-current limiter (SFCL) is operated without impedance in normal state. The fault-current is limited by its impedance during the fault condition. However, the SFCL has several weak points such as huge size, high-price, liquid-nitrogen operation for the real power system. In this paper, We suggested the high-speed interrupter to limit the fault-current in case of the single line-to-ground fault. In addition, we compared the high-speed interrupter with the SFCL to ensure the operation reliability. The proposed interrupter detected the fault-current through the CT, and the power was supplied by operation of the SCR control system. In this experiment, the power of high-speed interrupter was applied after the 4.8[msec] from fault instant. The on-off operation of the interrupter was started after half-cycle from the fault. The fault-current was flowed into the impedance element by the switching operation of the high-speed interrupter. So, the fault current was limited within one cycle, and then it didnt exceed the capacity of a circuit breaker. We confirmed that there was slight difference between the SFCL with high-speed interrupter in terms of limiting-time of the fault-current and switching speed of the SCR. The high-speed interrupter was considered to be more efficient than the SFCL in size, cost or reliability.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
• /
• v.13 no.4
• /
• pp.142-151
• /
• 1999

Linear Pulse Motors (LPM) are used a field where SImOth linear motion is required, and it's position accuracy higher than that of a lead According to the advanUlge such as simplicity of rrechanical frarre, high reliability, precise open-loop operation, low inertia etc. LPM is awlied largely where it have made motor of this kind more and rmre attractive in many application areas such as factory automation and high speed positioning. This paper is researched to analyze for force characteristics of hybrid LPM with high accuracy and repeatability. Both the thrust and normal force are very sensitive to the airgap and tooth pitches of the forcer and platen. Here, the thrust shows a high content while the normal force is much higher than the thrust. For magnetic circuits of hybrid LPM is the complicated structure, the finite element rrethod (FEM) is employed with suitable rrethod for calculating the force. Therefore, both the virtual work principle and maxwell stress tensor have been used.n used.

• Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
• /
• 2004.05a
• /
• pp.469-472
• /
• 2004

This paper proposed and analyzed the Serial Piston Actuator(SPA) by using mechanical spring system coupled with linear actuator though the simplified structure which was verified practical experiments. The input voltage characteristics of a linear actuator are analyzed on the structure of the Linear Actuator Model System. Simulation and experimental result have been performed for the verification of the proposed system and the voltage characteristics applied to a actuator winding by electromechanical energy conversion theory. This paper proposed and analyzed the Linear Actuator Model(LAM) by using Matlab program with linear actuator was verified computer simulation based on the energy conversion theory.