• Proceedings of the Materials Research Society of Korea Conference
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• 2003.03a
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• pp.68-68
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• 2003

최근의 전자부품은 고밀도 고집적화 됨에 따라 여러 가지 문제점들이 발생되고 있다. 그 중 부품이 실장되는 부분에 사용되는 솔더나 전기적 회로를 구성하는 패턴간에 금속 이온 마이그레이션(Metallic Ion Migration)이 발생하여 전기적 단락(Short)를 유발함으로써 전자제품의 치명적 고장을 유발한다. 본 연구는 이온 마이그레이션 현상을 물방울시험(Water Drop Test)을 통하여 재현함으로써 발생 메카니즘을 확인하여 발생원인을 직접적으로 관찰하고, 각 종 패턴의 거리 및 전압에 따른 발생속도의 차이를 조사하기 위하여 수행되었다. 이러한 실험을 위하여 콤 패턴(Comb Pattern)의 FR-4 재질 인쇄회로기판(PCB : Printed Circuit Board)을 사용하였으며, 사용된 전극재질로는 Cu, SnPb, Au를 사용하였고, 패턴간 거리는 0.5, 1.0, 2.0mm의 3가지 종류로 구분하였다. 또한 패턴간에 인간 된 전압은 6.5V, 15V를 인가한 후 마이그레이션이 발생되는 시간을 측정하였다. 이러한 실험으로부터 다음과 같은 결론을 얻었다. (1) 6.5V의 인가전압에서는 Cu 패턴이 대체적으로 가장 빠르게 마이그레이션이 발생하였으며, 다음으로 Au가 발생하였고, Cu와 SnPb의 발생시간은 대체적으로 근사한 값을 나타내었다. 이것은 비슷한 평형전위를 갖는 재료는 마이그레이션 발생시간이 유사하게 나타나며, 높은 (+)전위를 갖을수록 발생시간이 지연됨을 알 수 있다. (2) 15V를 인가하였을 때 패턴간격이 0.5mm인 경우 Cu, Au, SnPb의 순으로 나타났으며, 1.0mm는 SnPb, Cu, Au, 2.0mm인 경우는 SnPb, Au, Cu의 순으로 마이그레이션이 발생하였다. 인가전압이 높은 경우 초기 발생에는 큰 차이가 없지만 수지상이 발생 후 성장하는데 많은 영향을 미치는 것으로 보인다. 이것은 초기 수지상의 형성에 큰 영향을 미치는 것은 재료의 평형전위에 의한 값이 좌우하지만, 수지상이 일정길이 이상 형성된 이후에는 성장속도가 평형전위에 따른 값과는 다소 다르게 나타남을 알 수 있다.

• Journal of the Microelectronics and Packaging Society
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• v.7 no.1
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• pp.19-24
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• 2000

To make stacked chip packages far high-density packaging of memory chips used in workstations or PC severs, several lead-frames are to be connected vertically. Fer this purpose. Sn or Sn/Ag were electrochemically deposited on Cu lead-frames and their microstructures were examined by XRD and SEM. Then, two specimens were annealed at $250^{\circ}C$ for 10 min. and pressed to be joined. The shear stresses of joined lead-frames were measured fur comparison. In the case of Sn only, $Cu_3Sn$ was formed by the reaction of Sn and Cu lead-frames. In the case of Sn/Ag, besides $Cu_3Sn$. $Ag_3Sn$ was formed by the reaction of Sn and Ag. Compared to joined specimens made from Sn only, those made from Sn/Ag showed 1.2 times higher shear stress. This was attributed to the $Ag_3Sn$ phase formed at the joined interface.

• Korean Journal of Optics and Photonics
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• v.6 no.4
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• pp.379-384
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• 1995

In order to construct B-ISDN, it is inevitable to introduce optical fiber of low loss and wide bandwidth. Coincidently, high count optical fiber cable is solely important to form optical subscriber network. The best structure of high count optical fiber cable to achieve multi-splicing as well as high density at the same time is the one of taking optical ribbon as a unit of accomodation. However, since optical ribbon has its own width. optical loss due to length difference during the bending of ribbon cable unit occurs in relatively easy way. Therefore, care should be taken during its manufacturing and storage. In t\1::; paper, strain, bending radius and lateral pressure of each fiber in ribbon due to the bending of ribbon cable unit are caculated theoretically. Hence, we have measured optical loss of each fiber as function of unit bending radius, when we bent the ribbon cable unit on the various reel. We found that the result accords well with the theoretical analysis. The result shows the importance to determine proper radius of reel used in ribbon cable manufacturing and storage. orage.

• Journal of the Microelectronics and Packaging Society
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• v.6 no.4
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• pp.61-71
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• 1999

The recent trend toward higher frequencies, miniaturization and lower-cost in wireless communication equipment is demanding high density packaging technologies such flip chip interconnection and multichip module(MCM) as a substitute of conventional plastic package. With analyzing the recently reported research results of the RF flip chip, this paper presents the technical issues and advantages of RF flip chip and suggest the flip chip technologies suitable for the development stage. At first, most of RF flip chips are designed in a coplanar waveguide line instead of microstrip in order to achieve better electrical performance and to avoid the interaction with a substrate. Secondly, eliminating wafer back-side grinding, via formation, and back-side metallization enables the manufacturing cost to be reduced. Finally, the electrical performance of flip chip bonding is much better than that of plastic package and the flip chip interconnection is more suitable for Transmit/Receiver modules at higher frequency. However, the characterization of CPW designed RF flip chip must be thoroughly studied and the Au stud bump bonding shall be suggested at the earlier stage of RF flip chip development.