• Title/Summary/Keyword: 검증 소프트웨어

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An Optimized Hardware Implementation of SHA-3 Hash Functions (SHA-3 해시 함수의 최적화된 하드웨어 구현)

  • Kim, Dong-Seong;Shin, Kyung-Wook
    • Journal of IKEEE
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    • v.22 no.4
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    • pp.886-895
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    • 2018
  • This paper describes a hardware design of the Secure Hash Algorithm-3 (SHA-3) hash functions that are the latest version of the SHA family of standards released by NIST, and an implementation of ARM Cortex-M0 interface for security SoC applications. To achieve an optimized design, the tradeoff between hardware complexity and performance was analyzed for five hardware architectures, and the datapath of round block was determined to be 1600-bit on the basis of the analysis results. In addition, the padder with a 64-bit interface to round block was implemented in hardware. A SoC prototype that integrates the SHA-3 hash processor, Cortex-M0 and AHB interface was implemented in Cyclone-V FPGA device, and the hardware/software co-verification was carried out. The SHA-3 hash processor uses 1,672 slices of Virtex-5 FPGA and has an estimated maximum clock frequency of 289 Mhz, achieving a throughput of 5.04 Gbps.

Parallel Structure Design Method for Mass Spring Simulation (질량스프링 시뮬레이션을 위한 병렬 구조 설계 방법)

  • Sung, Nak-Jun;Choi, Yoo-Joo;Hong, Min
    • Journal of the Korea Computer Graphics Society
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    • v.25 no.3
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    • pp.55-63
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    • 2019
  • Recently, the GPU computing method has been utilized to improve the performance of the physics simulation field. In particular, in the case of a deformed object simulation requiring a large amount of computation, a GPU-based parallel processing algorithm is required to guarantee real-time performance. We have studied the parallel structure design method to improve the performance of the mass spring simulation method which is one of the methods of implementing the deformation object simulation. We used OpenGL's GLSL, a graphics library that allows direct access to the GPU, and implemented the GPGPU environment using an independent pipeline, the compute shader. In order to verify the effectiveness of the parallel structure design method, the mass - spring system was implemented based on CPU and GPU. Experimental results show that the proposed method improves computation speed by about 6,000% compared to the CPU Environment. It is expected that the lightweight simulation technology can be effectively applied to the augmented reality and the virtual reality field by using the design method proposed later in this research.

Estimating Hydrodynamic Coefficients with Various Trim and Draught Conditions (흘수 및 트림 변화를 고려한 선박 유체력 미계수 추정에 관한 연구)

  • Kim, Daewon;Benedict, Knud;Paschen, Mathias
    • Journal of the Korean Society of Marine Environment & Safety
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    • v.23 no.7
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    • pp.933-940
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    • 2017
  • Draught and trim conditions are highly related to the loading condition of a vessel and are important factors in predicting ship manoeuverability. This paper estimates hydrodynamic coefficients from sea trial measurements with three different trim and draught conditions. A mathematical optimization method for system identification was applied to estimate the forces and moment acting on the hull. Also, fast time simulation software based on the Rheinmetall Defense model was applied to the whole estimation process, and a 4,500 Twenty-foot Equivalent Unit (TEU) class container carrier was chosen to collect sets of measurement data. Simulation results using both optimized coefficients and newly-calculated coefficients for validation agreed well with benchmark data. The results show mathematical optimization using sea measurement data enables hydrodynamic coefficients to be estimated more simply.

Efficient Computing Algorithm for Inter Prediction SAD of HEVC Encoder (HEVC 부호기의 Inter Prediction SAD 연산을 위한 효율적인 알고리즘)

  • Jeon, Sung-Hun;Ryoo, Kwangki
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2016.10a
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    • pp.397-400
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    • 2016
  • In this paper, we propose an efficient algorithm for computing architecture for high-performance Inter Prediction SAD HEVC encoder. HEVC Motion Estimation (ME) of the Inter Prediction is a process for searching for the currently high prediction block PU and the correlation in the interpolated reference picture in order to remove temporal redundancy. ME algorithm uses full search(FS) or fast search algorithm. Full search technique has the guaranteed optimal results but has many disadvantages which include high calculation and operational time due to the motion prediction with respect to all candidate blocks in a given search area. Therefore, this paper proposes a new algorithm which reduces the computational complexity by reusing the SAD operation in full search to reduce the amount of calculation and computational time of the Inter Prediction. The proposed algorithm is applied to an HEVC standard software HM16.12. There was an improved operational time of 61% compared to the traditional full search algorithm, BDBitrate was decreased by 11.81% and BDPSNR increased by about 0.5%.

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A Cortex-M0 based Security System-on-Chip Embedded with Block Ciphers and Hash Function IP (블록암호와 해시 함수 IP가 내장된 Cortex-M0 기반의 보안 시스템 온 칩)

  • Choe, Jun-Yeong;Choi, Jun-Baek;Shin, Kyung-Wook
    • Journal of IKEEE
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    • v.23 no.2
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    • pp.388-394
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    • 2019
  • This paper describes a design of security system-on-chip (SoC) that integrates a Cortex-M0 CPU with an AAW (ARIA-AES- Whirlpool) crypto-core which implements two block cipher algorithms of ARIA and AES and a hash function Whirlpool into an unified hardware architecture. The AAW crypto-core was implemented in a small area through hardware sharing based on algorithmic characteristics of ARIA, AES and Whirlpool, and it supports key sizes of 128-bit and 256-bit. The designed security SoC was implemented on FPGA device and verified by hardware-software co-operation. The AAW crypto-core occupied 5,911 slices, and the AHB_Slave including the AAW crypto-core was implemented with 6,366 slices. The maximum clock frequency of the AHB_Slave was estimated at 36 MHz, the estimated throughputs of the ARIA-128 and the AES-128 was 83 Mbps and 78 Mbps respectively, and the throughput of the Whirlpool hash function of 512-bit block was 156 Mbps.

A Study on the Instructional Model utilizing Scratch for Introductory Programming Classes of SW-Major Students (SW전공자 프로그래밍 입문 수업의 스크래치 활용 수업 모형 연구)

  • KO, Kwangil
    • Convergence Security Journal
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    • v.18 no.2
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    • pp.59-67
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    • 2018
  • The programming language is a core education area of software that is becoming increasingly important in the age of the fourth industrial revolution, but it requires mathematical knowledge and logical thinking skills, so that many local private university and college students with low basic skills are having difficulties learning it. This problem occasionally causes SW-major students to lose interest and confidence in their majors during the introductory course of programming languages; making them change their majors, or give up their studies. In this study, we designed an instructional model using Scratch for educating C-language which is a typical programming introductory language. To do this, we analyzed the concepts that can be trained by Scratch among the programming concepts supported by C-language, and developed the examples of Scratch for exercising the concepts. In addition, we designed an instructional model, by which the programming concepts are first learned through Scratch and then C-language is taught, and conducted an experiment on the SW-major freshman students of a local private university to verify the effectiveness of the model. In the situation where SW education is becoming common, we expect that this study will help programming language education of security IT students.

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Development of High Precision Impedance Measurement Systems in Specific Ranges Using a Microprocessor (마이크로프로세서를 이용한 특정 영역에서 고정밀 임피던스 측정 시스템 개발)

  • Ryu, Jae-Chun;Lee, Myung-Eui
    • Journal of Advanced Navigation Technology
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    • v.23 no.4
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    • pp.316-321
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    • 2019
  • In this paper, by applying the constant current principle we develop an impedance measurement system which can measure the high precision impedance of various electric materials by using microprocessor. This measurement system board has an interface device for acquiring digital data from an external device including an impedance measuring device, and system software is also developed by a firmware program executed on such an embedded board. It can measure the high precision impedance of a specific band with 1/32768 precision by using 15-bit ADC(analog to digital converter) and calculate it to the five digits to the right of the decimal point(fraction part). Data is transmitted through a USB interface of a general computer and a measuring device to manage digital data. An impedance measurement system equipped with a communication function capable of a more general and easy-to-use interface than other equipment is developed and verified.

The Effects of Middle School Mathematical Statistics Area and Python Programming STEAM Instruction on Problem Solving Ability and Curriculum Interest (중학교 수학 통계 영역과 파이썬(Python) 프로그래밍 융합수업이 문제해결력과 교과 흥미도에 미치는 영향)

  • Lee, Do-Young;Chung, Jong-In
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.20 no.4
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    • pp.336-344
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    • 2019
  • The Ministry of Education (2015) announced the "2015 Revised Curriculum for Elementary and Secondary Schools" and announced that SW (Software) training for elementary and junior high school students to develop Computational Thinking will be gradually introduced from 2018. In addition, 'problem solving' and 'programming' have become important areas. Furthermore, the ability to analyze and utilize big data is becoming more emphasized. We developed and applied the statistical - Python programming convergence curriculum based on the idea that convergence education combining information and mathematics, programming and statistical literacy is needed according to current trends. Before and after the experiment, problem solving ability test and programming / mathematical interest test were conducted and compared with the corresponding sample t-test. According to the analysis results, there were significant differences in the pre- and post-test on problem solving ability, programming interest and mathematical interest at the significance level of 0.05.

Classification Performance Improvement of UNSW-NB15 Dataset Based on Feature Selection (특징선택 기법에 기반한 UNSW-NB15 데이터셋의 분류 성능 개선)

  • Lee, Dae-Bum;Seo, Jae-Hyun
    • Journal of the Korea Convergence Society
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    • v.10 no.5
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    • pp.35-42
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    • 2019
  • Recently, as the Internet and various wearable devices have appeared, Internet technology has contributed to obtaining more convenient information and doing business. However, as the internet is used in various parts, the attack surface points that are exposed to attacks are increasing, Attempts to invade networks aimed at taking unfair advantage, such as cyber terrorism, are also increasing. In this paper, we propose a feature selection method to improve the classification performance of the class to classify the abnormal behavior in the network traffic. The UNSW-NB15 dataset has a rare class imbalance problem with relatively few instances compared to other classes, and an undersampling method is used to eliminate it. We use the SVM, k-NN, and decision tree algorithms and extract a subset of combinations with superior detection accuracy and RMSE through training and verification. The subset has recall values of more than 98% through the wrapper based experiments and the DT_PSO showed the best performance.

Database Reverse Engineering Using Master Data in Microservice Architecture (마스터 데이터를 활용한 마이크로 서비스 아키텍처에서의 데이터베이스 리버스 엔지니어링)

  • Shin, Kwang-chul;Lee, Choon Y.
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.23 no.5
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    • pp.523-532
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    • 2019
  • Microservice architecture focuses on dividing it into small and lightweight services to build for the purpose of performing very close business functions. So it tends to concentrate only on agility, productivity, reliability, and ease of deployment of software development. Microservice architecture considers database as just a file or storage for storing and extracting data, emphasizing that data quality can be sacrificed for convenience and scalability of software development. Database reverse engineering for understanding database structure and data semantics is needed for data utilization for business decision making. However, it is difficult that reverse database engineering is applied in microservice architecture that neglects data quality. This study proposes database reverse engineering method that utilizes master data to restore the conceptual data model as a solution. The proposed method is applied to the return service database implemented by microservice architecture and verified its applicability.