• Journal of KIISE:Computing Practices and Letters
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• v.5 no.4
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• pp.385-394
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• 1999

제품을 설계하는 디자이너나 엔지니어는 많은 시간과 노력을 들이지 않고서 그들이 설계한 3차원 제품 모델에 대한 사실적인 이미지를 원한다. 디자인 프로세스의 초기인 개념 설계에서부터 설계검증, 그리고 가공 과정에서 사실적인 이미지가 매우 유용하므로, 대부분의 주요 CAD 제작사는 그들의 CAD 소프트웨어에 고급 렌더링 기능을 추가하고 있다. 상용의 CAD/CAM 모델러에서는 NURB 곡면을 기초로 모델링을 수행하므로, NURB 곡면을 렌더링할 수 있는 패키지가 필요하다. VIF(Visual InterFace) 렌더링 라이브러리는 A-buffer 방식과 Ray tracing 방식의 두 가지 고급 렌더링 모드를 제공한다. 다각형은 물론 NURB 곡면을 입력으로 받아 사용자가 설정한 표면의 각종 계수, 원하는 view와 설정된 광원에 따라 이미지를 만들고 다양한 형태로 출력시킬 수 있는 다양한 기능을 제공한다. 본 논문에서는 VIF 렌더링 라이브러리에 대한 구조와 기능별로 분류된 함수에 대하여 설명하며, 실제로 CAD/CAM 시스템과 통합되어 구상설계에서부터 3차원 설계 모델링에 이르기까지의 제조공정에서 설계검증 툴로써 어떻게 활용되고 있는가에 대하여 기술한다.Abstract Engineers and industrial designers want to produce a realistic-looking images of a 3D model without spending a lot of time and money. Photo-realistic images are so useful from the conceptual design, through its verification, to the machining, that most major CAD venders offer built-in as well as add-on photo-realistic rendering capability to their core CAD software. Since 3D model is consists of a set of NURB surfaces in commercial CAD packages, we need a renderer which handles NURB surface as well as other primitives.A new rendering library called VIF (Visual InterFace) provides two photo-realistic rendering modes: A-buffer and Ray tracing. As an input data it takes NURB surfaces as well as polygonal data and produces images in accordance with the surface parameters, view and lights set by user and outputs image with different formats. This paper describes the overall architecture of VIF and its library functions classified by their functionalities, and discusses how VIF is used as a graphical verification tool in manufacturing processes from the conceptual design to 3D modeling.

• KIPS Transactions on Software and Data Engineering
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• v.9 no.10
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• pp.323-328
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• 2020

Recently, new approaches that significantly improve performance in object detection and recognition using deep learning technology have been proposed quickly. Of the various techniques for object detection, especially facial object detection (Faster R-CNN, R-CNN, YOLO, SSD, etc), SSD is superior in accuracy and speed to other techniques. At the same time, multiple object detection networks are also readily available. In this paper, among object detection networks, Mobilenet v2 network is used, models combined with SSDs are trained, and methods for detecting objects at a rate of four times or more than conventional performance are proposed using TensorRT engine, and the performance is verified through experiments. Facial object detector was created as an application to verify the performance of the proposed method, and its behavior and performance were tested in various situations.

• Journal of KIISE:Software and Applications
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• v.33 no.2
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• pp.186-200
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• 2006

Analysis model focuses only on functional requirements and postpones nonfunctional requirements and implementation specific issues until subsequent design activities are undertaken. Based on the analysis models, the design activities are performed by refining and clarifying the analysis models. Thus, the quality of analysis models has a vast impact on the design models. Therefore, much effort should be taken to build correct analysis model. In this paper, we propose a set of structural constraints that analysis models of typical object-oriented development methods should satisfy. Three kinds of constraints are proposed: class related constraints, relation related constraints, and usage related constraints. For each constraint, formal definition and description with OCL are provided. In addition, through a case study with two medium-sired industrial systems, we demonstrated that the proposed approach can help to identify and correct serious deficiencies in object-oriented analysis models.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.40 no.4
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• pp.692-699
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• 2015

Evarything as a Service (XaaS) is a software, platform, infra distribution method which provide users with necessary modules, not entire modules, as a service. To efficiently and securely operate services such as XaaS, it is needed to solve various Internet problems like network congestion, weak security and so on. Future Internet technologies are provided to solve such problems. Specially, named data networking architecture (NDN) proposes that network nodes cache transmitted data, and then they send the cached data if receiving request messages for the cached data. So NDN can efficiently diffuse excessive request messages transmitted toward original contents providers. However, when receiving contents through NDN, receivers can not confirm the practical providers because the practical providers can be different from original contents providers. Hence, it is requested for receivers to verify the received contents and such a verification process can cause service delay of XaaS. In this paper, we improve a content verification scheme of NDN to enhance the performance of services such as XaaS.

• Journal of the Korea Society of Computer and Information
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• v.11 no.5 s.43
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• pp.139-148
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• 2006

This study is intended to propose quality criteria and Web metrics for usability quality evaluation of multimedia Web sites. Recently, applications of the Web sites are not limited to the area of industry and operating as it integrates the new technology. Also as information super highway becomes common with development or network technology, multimedia Web site is on the rise due to various use of multimedia attributes. Therefore this study expands to apply HTML based Web site quality evaluation studied in Software engineering, HCI, Hypermedia to multimedia Web site, and suggests new metrics by integrating flash usability which is expanding its portion in multimedia Web site lately. The Web metrics proposed in this study are verified by heuristic evaluation from a group of expert. It analyses the results of quantitative and qualitative qualify evaluation on Web Award Korea by comparing the award-winning, high-quality Web site with non-winning Web sites. This study can be used to establish guideline for high-quality multimedia Web site development in the future.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2013.10a
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• pp.809-812
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• 2013

This paper realize power control embedded system with one master of Core-A 32-bit RISC processor and several slaves controling power with synchronized digital signals. Core-A platform provided by Dynalith Systems consists of Core-A processor, AMBA bus, SSRAM, AC97, DMA, UART, GPIO etc. Slave is made by both digital part and analog part. The former generates various power control patterns synchronized with master signal. The latter converts 220V power proportional to 4 bit digital signals. Design of Embedded system is executed in Flowrian2 of System Centroid Inc., in which software is cross-compiled and hardware is verified by simulation. Embedded system is implemented in FPGA board and CPLD chips as well as PCB board for analog power control.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.18 no.6
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• pp.1413-1421
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• 2014

This paper realize power control embedded system with one master of Core-A 32-bit RISC processor and several slaves controling power with synchronized digital signals. Core-A platform is consisted of Core-A processor, AMBA bus, SSRAM, AC97, DMA, UART, GPIO etc. Slave is made by both digital part and analog part. The former generates various power control patterns synchronized with master signal. The latter converts 220V power proportional to 4 bit digital signals. design of Embedded system is executed in Flowrian II, in which software is cross-compiled and hardware is verified by simulation. Embedded system is implemented in FPGA board and CPLD chips as well as PCB board for analog power control.

• KIPS Transactions on Software and Data Engineering
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• v.3 no.9
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• pp.341-348
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• 2014

The advance in web accessibility with dissemination of smart phones gives rise to rapid increment of users on social network platforms. Many research projects are in progress to detect events using Twitter because it has a powerful influence on the dissemination of information with its open networks, and it is the representative service which generates more than 500 million Tweets a day in average; however, existing studies to detect events has been used TFIDF algorithm without any consideration of the various conditions of tweets. In addition, some of them detected predefined events. In this paper, we propose the RTFIDF VT algorithm which is a modified algorithm of TFIDF by reflecting features of Twitter. We also verified the optimal section of TF and DF for detecting events through the experiment. Finally, we suggest a system that extracts result-sets of places and related keywords at the given specific time using the RTFIDF VT algorithm and validated section of TF and DF.

• Journal of Advanced Marine Engineering and Technology
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• v.40 no.9
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• pp.791-798
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• 2016

In this study, numerical simulations on the effects of bilge keel on roll motion were conducted. The numerical simulations were performed on a 110 m class PSV using the commercial viscous flow analysis software Star-CCM+. Before conducting the study on the 110 m class PSV, an additional simulation of DTMB 5512 was performed and compared with the experimental results to validate the feasibility of the numerical simulation. In the simulation on PSV, a nondimensional damping coefficient was calculated using a free roll decay simulation, and the response amplitude operator (RAO) for the roll motion was calculated with a nondimensional damping coefficient at two conditions (with/without bilge keel).

• Journal of the Korea Society for Simulation
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• v.15 no.1
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• pp.11-17
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• 2006

This paper shows a case study of designing a PLC logic simulator that was developed to simulate and verify PLC control programs for nuclear plant systems. The nuclear control system requires strict restrictions rather than normal process control system does, as it works with a high-risky and dangerous nuclear plant. One is that it should assure the safeness of the control programs by exploiting severe testing. The other restriction is that the control programs should be executed fast enough such that they could control multi devices concurrently in real-time. To cope with these restrictions, we devised a logic compiler which generates C-code programs from given PLC logic programs. Once the logic program was translated into C-code, the program could be analyzed by conventional software analysis tools and could be used to construct a fast logic simulator after cross-compiling, in fact, that is a kind of compiled-code simulator.