• Journal of the Korean Crystal Growth and Crystal Technology
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• v.4 no.1
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• pp.71-75
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• 1994

In this study, a thermoelastic stress index of (100) oriented single crystalline silicon wafer and a relationship between thermal stress and critical plastic deformation temperatures were simulated. The simulated results for the thermoelastic stress index indicated a maximum value on <110> direction and a minimum on <100>. Then, it could be predicted that silicon wafer is plastically deformable over 1000 K, based on the relationship between the thermal stress derived from the thermoelastic stress index and the critical plastic deformation temperature.

• Journal of the Optical Society of Korea
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• v.18 no.5
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• pp.569-573
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• 2014

We demonstrate a low-cost, superbly efficient way of etching for the nano-, and micro-sized pyramid patterns on (100)-oriented Si wafer surfaces for use as a patterned master. We show a way of producing functional optical films for the viewing angle direction brightness-enhancement of Lambertian LED (light emitting diode)/OLED (organic light emitting diode) planar lighting applications. An optimally formulated KOH (Potassium hydroxide) wet etching process enabled random-positioned, and random size-distributed (within a certain size range) pyramid patterns to be developed over the entire (100) silicon wafer substrates up to 8" and a simple replication process of master patterns onto the PC (poly-carbonate) and PMMA (poly-methyl methacrylate) films were performed. Haze ratio values were measured for several film samples exhibiting excellent values over 90% suitable for LED/OLED lighting purposes. Brightness was also improved by 13~14% toward the viewing angle direction. Computational simulations using LightTools$^{TM}$ were also carried out and turned out to be in strong agreement with experimental data. Finally, we could check the feasibility of fabricating low-cost, large area, high performance optical films for commercialization.

• Journal of the Korean Ceramic Society
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• v.40 no.8
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• pp.770-776
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• 2003

#140 mesh and #600 mesh wheels were adopted to grind (111) and (100) oriented single crystalline silicon wafer and the grinding induced change of the surface integrity was investigated. For this purpose, microroughness, residual stress and phase transformation were analyzed for the ground surface. Microroughness was analyzed using AFM (Atomic Force Microscope) and crystal structure was analyzed using micro-Raman spectroscopy. The residual stress and phase transformation were also analyzed after thermal annealing in the air. As a result, microroughness of (111) wafer was larger than that of (100) wafer after grinding. It was observed using Raman spectrum that the silicon was transformed from diamond cubic Si-I to Si-III(body centered tetragonal) or Si-XII(rhombohedral). Residual stress relaxation was also shown in cavities which were produced after grinding. The thermal annealing was effective for the recovery of the silicon phase to the original phase and the residual stress relaxation.

• Proceedings of the KIEE Conference
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• 1996.07c
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• pp.1988-1990
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• 1996

In this work, we have grown or evaporated thermal oxide and E-beam oxide on the (100) oriented n-type silicon wafers, respectively and they were directly bonded with another silicon wafer after hydrophilization using solutions of three types of $HNO_3$, $H_{2}SO_{4}$ and $NH_{4}OH$. Changes of average surface roughness after hydrophilizations of the single crystalline silicon wafer, thermal oxide and E-beam evaporated silicon oxide were studied using atomic force microscope. Bonding interfaces of the bonded pairs were inspected using scanning electron microscope. Void and non-contact area of the bonded pairs were also inspected using infrared transmission microscope.

• 한국신재생에너지학회:학술대회논문집
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• 2007.06a
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• pp.295-298
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• 2007

Reduction of optical losses in crystalline silicon solar cells by surface modification is one of the most important issues of silicon photovoltaics. Porous Si layers on the front surface of textured Si substrates have been investigated with the aim of improving the optical losses of the solar cells, because an anti-reflection coating(ARC) and a surface passivation can be obtained simultaneously in one process. We have demonstrated the feasibility of a very efficient porous Si ARC layer, prepared by a simple, cost effective, electrochemical etching method. Silicon p-type CZ (100) oriented wafers were textured by anisotropic etching in sodium carbonate solution. Then, the porous Si layers were formed by electrochemical etching in HF solutions. After that, the properties of porous Si in terms of morphology, structure and reflectance are summarized. The structure of porous Si layers was investigated with SEM. The formation of a nanoporous Si layer about 100nm thick on the textured silicon wafer result in a reflectance lower than 5% in the wavelength region from 500 to 900nm. Such a surface modification allows improving the Si solar cell characteristics. An efficiency of 13.4% is achieved on a monocrystalline silicon solar cell using the electrochemical technique.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.22 no.7
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• pp.616-621
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• 2009

Reduction of optical losses in crystalline silicon solar cells by surface modification is one of the most important issues of silicon photovoltaics. Porous Si layers on the front surface of textured Si substrates have been investigated with the aim of improving the optical losses of the solar cells, because an anti-reflection coating(ARC) and a surface passivation can be obtained simultaneously in one process. We have demonstrated the feasibility of a very efficient porous Si ARC layer, prepared by a simple, cost effective, electrochemical etching method. Silicon p-type CZ (100) oriented wafers were textured by anisotropic etching in sodium carbonate solution. Then, the porous Si layers were formed by electrochemical etching in HF solutions. After that, the properties of porous Si in terms of morphology, structure and reflectance are summarized. The structure of porous Si layers was investigated with SEM. The formation of a nanoporous Si layer about 100nm thick on the textured silicon wafer result in a reflectance lower than 5% in the wavelength region from 500 to 900nm. Such a surface modification allows improving the Si solar cell characteristics. An efficiency of 13.4% is achieved on a monocrystalline silicon solar cell using the electrochemical technique.

• New & Renewable Energy
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• v.2 no.2 s.6
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• pp.4-8
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• 2006

Reduction of optical losses in crystalline silicon solar cells by surface modification is one of the most important issues of silicon photovoltaics. Porous Si layers on the front surface of textured Si substrates have been investigated with the aim of improving the optical losses of the solar cells, because an anti-reflection coating and a surface passivation can be obtained simultaneously in one process. We have demonstrated the feasibility of a very efficient porous Si AR layer, prepared by a simple, cost effective, electrochemical etching method. Silicon p-type CZ (100) oriented wafers were textured by anisotropic etching in sodium carbonate solution. Then, the porous Si layer were formed by electrochemical etching in HF solutions. After that, the properties of porous Si in terms of morphology, structure and reflectance are summarized. The surface morphology of porous Si layers were investigated using SEM. The formation of a porous Si layer about $0.1{\mu}m$ thick on the textured silicon wafer result in an effective reflectance coefficient Reff lower than 5% in the wavelength region from 400 to 1000nm. Such a surface modification allows improving the Si solar cell characteristics.

• 한국신재생에너지학회:학술대회논문집
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• 2006.06a
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• pp.183-186
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• 2006

Reduction of optical losses in crystalline silicon solar cells by surface modification is one of the most important issues of silicon photovoltaics. Porous Si layers on the front surface of textured Si substrates have been investigated with the aim of improving the optical losses of the solar cells, because an anti-reflection coating and a surface passivation can be obtained simultaneously in one process. We have demonstrated the feasibility of a very efficient porous Si AR layer, prepared by a simple, cost effective, electrochemical etching method. Silicon p-type CZ (100) oriented wafers were textured by anisotropic etching in sodium carbonate solution. Then, the porous Si layer were formed by electrochemical etching in HF solutions. After that, the properties of porous Si in terms of morphology, structure and reflectance are summarized. The surface morphology of porous Si layers were investigated using SEM. The formation of a porous Si layer about $0.1{\mu}m$ thick on the textured silicon wafer result in an effective reflectance coefficient $R_{eff}$ lower than 5% in the wavelength region from 400 to 1000nm. Such a surface modification allows improving the Si solar cell characteristics.

• Journal of the Korean Vacuum Society
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• v.9 no.3
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• pp.267-272
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• 2000

Electroplating Cu was deposited on Si(100) wafer after seed Cu was deposited by sputtering first. TaN was deposited as a diffusion barrier before depositing the seed Cu. Electroplating Cu thin films show highly (111)-oriented microstructure for both before and after annealing at $450^{\circ}C$ for 30min and no copper silicide was detected in the same samples, which indicates that TaN barrier layer blocks well the Cu diffusion into silicon substrate. After annealing the electroplating Cu film up to $450^{\circ}C$, the Cu film became columnar from non-columnar, its grain size became larger about two times, and also defects density of stacking faults, twins and dislocations decreased greatly. Thus the heat treatment will improve significantly electromigration property caused by the grain boundary in the Cu thin films.

• Journal of Sensor Science and Technology
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• v.6 no.5
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• pp.346-355
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• 1997

In this paper, the analyses of the stress disturibution and frequency characteristics of silicon microstructures for an accelerometer were performed using the general purpose finite element simulation program, ANSYS. From the analyses, we determined the parameter values of a new 6-beam piezoresistive accelerometer applicable to the accelerometer's specification in airbag system of automobile. Then, the mass paddle radius, beam length, beam width, and beam thickness of the designed accelerometer were$500{\mu}m$, $350{\mu}m$, $100{\mu}m$, and $5{\mu}m$, respectively and two different seismic masses with 0.4 mg and 0.8 mg were defined on the same sensor structure. The designed 6- beam accelerometers were fabricated on the selectively diffused (111)-oriented $n/n^{+}/n$ silicon substrates and the characteristics of the fabricated accelerometers were investigated. Then, we used a micromachining technique using porous silicon etching method for the formation of the micromechanical structure of the accelerometer.