• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.22 no.1
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• pp.29-34
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• 2009

PLZT thin films were deposited on platinized silicon (Pt/$TiSiO_2$/Si) substrate by RF magnetron sputtering. A $TiO_2$ buffer layer was fabricated, prior to deposition of PLZT films. the layer was strongly affected the crystallographic orientation of the PLZT films. X-ray diffraction was performed on the films to study the crystallization of the films as various substrate temperatures (Ts). According to increasing Ts, preferred orientation of films was changed (110) plane to (111) plane. The ferroelectric, dielectric and electrical properties of the films were also investigated in detail as increased substrate temperatures. The PLZT films deposited at $400^{\circ}C$ showed good ferroelectric properties with the remnant polarization of $15.8{\mu}C/cm^2$ and leakage current of $5.4{\times}10^{-9}\;A/cm^2$.

• Journal of the Korean Ceramic Society
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• v.42 no.12 s.283
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• pp.787-792
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• 2005

A symmetrical LSCF $(La_{0.6}Sr_{0.4}Co_{0.2}Fe_{0.8}O_{3-\delta})\;ScSZ(89ZrO_2-10Sc_2O_3-1CeO_2)/LSCF$ electrochemical cell with a GDC (Gadolinium-Doped Ceria, $90CeO_2-10Gd_2O_3$) interlayer that was inserted between the LSCF cathode and ScSZ electrolyte was fabricated, and the electrochemical performance of these cells was evaluated. The GDC interlayer was deposited on a ScSZ electrolyte using a screen-printing technique. The GDC interlayer prevented the unfavorable solid-state reactions at the LSCF/ScSZ interfaces. The LSCF cathode on the GDC interlayer had excellent electrocatalytic performance even at $650^{\circ}C$. The Area Specific Resistance (ASR) was strongly dependent on the thickness and heat-treatment temperature of the GDC interlayer. The impedance spectra showed that the cell with a $15\~27{\mu}m$ thick GDC interlayer heat-treated at $1200^{\circ}C$ had the lowest ASR.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.06a
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• pp.174-174
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• 2008

Non-volatile memories using ferroelectric-gate field-effect transistors (Fe-FETs) with a metal/ferroelectric/semiconductor gate stack (MFS-FETs) make non-destructive read operation possible. In addition, they also have features such as high switching speed, non-volatility, radiation tolerance, and high density. However, the interface reaction between ferroelectric materials and Si substrates, i.e. generation of mobile ions and short retention, make it difficult to obtain a good ferroelectric/Si interface in an MFS-FET's gate. To overcome these difficulties, Fe-FETs with a metal/ferroelectric/insulator/semiconductor gate stack (MFIS-FETs) have been proposed, where insulator as a buffer layer is inserted between ferroelectric materials and Si substrates. We prepared $SrBi_2Ta_2O_9$ (SBT) film as a ferroelectric layer and $LaZrO_x$ (LZO) film as a buffer layer on p-type (100) silicon wafer for making the MFIS-FET devices. For definition of source and drain region, phosphosilicate glass (PSG) thin film was used as a doping source of phosphorus (P). Ultimately, the n-channel ferroelectric-gate FET using the SBT/LZO/Si Structure is fabricated. To examine the ferroelectric effect of the fabricated Fe-FETs, drain current ($I_d$) versus gate voltage ($V_g$) characteristics in logarithmic scale was measured. Also, drain current ($I_d$) versus drain voltage ($V_d$) characteristics of the fabricated SBT/LZO/Si MFIS-FETs was measured according to the gate voltage variation.

• Korean Journal of Materials Research
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• v.8 no.12
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• pp.1170-1175
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• 1998

PZT films without lower electrode were deposited on the highly doped Si(100) substrate with MgO buffer layer (Mgo/si) by RF magnetron sputtering method followed by the rapid thermal annealing at $650^{\circ}C$ . We investigated the dependences of the crystalline and electrical properties on the MgO thickness and the RTA post annealing. The PZT films on bare Si (without MgO) showed pyrochlore crystal structure while those on MgO(50 )/Si substrates showed the typical perovskite crystal structures. From SEM and AES analysis, the thickness of PZT films was about 7000 showing relatively smooth interface. The depth profiles indicated that atomic species were distributed homogeneously in the PZT/MgO/Si substrate. The dielectric constant($\varepsilon_{r}$ ) and remanent polarization(2Pr) were about 300 and $14\mu$C/$\textrm{cm}^2$;, respectively. The leakage current was about $3.2\mu$/A$\textrm{cm}^2$.

• JSTS:Journal of Semiconductor Technology and Science
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• v.8 no.1
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• pp.66-79
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• 2008

Several oxides have recently been reported to have resistance-switching characteristics for nonvolatile memory (NVM) applications. Both binary and ternary oxides demonstrated great potential as resistive-switching memory elements. However, the switching mechanisms have not yet been clearly understood, and the uniformity and reproducibility of devices have not been sufficient for gigabit-NVM applications. The primary requirements for oxides in memory applications are scalability, fast switching speed, good memory retention, a reasonable resistive window, and constant working voltage. In this paper, we discuss several materials that are resistive-switching elements and also focus on their switching mechanisms. We evaluated non-stoichiometric polycrystalline oxides ($Nb_2O_5$, and $ZrO_x$) and subsequently the resistive switching of $Cu_xO$ and heavily Cu-doped $MoO_x$ film for their compatibility with modem transistor-process cycles. Single-crystalline Nb-doped $SrTiO_3$ (NbSTO) was also investigated, and we found a Pt/single-crystal NbSTO Schottky junction had excellent memory characteristics. Epitaxial NbSTO film was grown on an Si substrate using conducting TiN as a buffer layer to introduce single-crystal NbSTO into the CMOS process and preserve its excellent electrical characteristics.