• Title/Summary/Keyword: $SiO_2$ buffer layer

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Hybrid MBE Growth of Crack-Free GaN Layers on Si (110) Substrates

  • Park, Cheol-Hyeon;O, Jae-Eung;No, Yeong-Gyun;Lee, Sang-Tae;Kim, Mun-Deok
    • Proceedings of the Korean Vacuum Society Conference
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    • 2013.02a
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    • pp.183-184
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    • 2013
  • Two main MBE growth techniques have been used: plasma-assisted MBE (PA-MBE), which utilizes a rf plasma to supply active nitrogen, and ammonia MBE, in which nitrogen is supplied by pyrolysis of NH3 on the sample surface during growth. PA-MBE is typically performed under metal-rich growth conditions, which results in the formation of gallium droplets on the sample surface and a narrow range of conditions for optimal growth. In contrast, high-quality GaN films can be grown by ammonia MBE under an excess nitrogen flux, which in principle should result in improved device uniformity due to the elimination of droplets and wider range of stable growth conditions. A drawback of ammonia MBE, on the other hand, is a serious memory effect of NH3 condensed on the cryo-panels and the vicinity of heaters, which ruins the control of critical growth stages, i.e. the native oxide desorption and the surface reconstruction, and the accurate control of V/III ratio, especially in the initial stage of seed layer growth. In this paper, we demonstrate that the reliable and reproducible growth of GaN on Si (110) substrates is successfully achieved by combining two MBE growth technologies using rf plasma and ammonia and setting a proper growth protocol. Samples were grown in a MBE system equipped with both a nitrogen rf plasma source (SVT) and an ammonia source. The ammonia gas purity was >99.9999% and further purified by using a getter filter. The custom-made injector designed to focus the ammonia flux onto the substrate was used for the gas delivery, while aluminum and gallium were provided via conventional effusion cells. The growth sequence to minimize the residual ammonia and subsequent memory effects is the following: (1) Native oxides are desorbed at $750^{\circ}C$ (Fig. (a) for [$1^-10$] and [001] azimuth) (2) 40 nm thick AlN is first grown using nitrogen rf plasma source at $900^{\circ}C$ nder the optimized condition to maintain the layer by layer growth of AlN buffer layer and slightly Al-rich condition. (Fig. (b)) (3) After switching to ammonia source, GaN growth is initiated with different V/III ratio and temperature conditions. A streaky RHEED pattern with an appearance of a weak ($2{\times}2$) reconstruction characteristic of Ga-polarity is observed all along the growth of subsequent GaN layer under optimized conditions. (Fig. (c)) The structural properties as well as dislocation densities as a function of growth conditions have been investigated using symmetrical and asymmetrical x-ray rocking curves. The electrical characteristics as a function of buffer and GaN layer growth conditions as well as the growth sequence will be also discussed. Figure: (a) RHEED pattern after oxide desorption (b) after 40 nm thick AlN growth using nitrogen rf plasma source and (c) after 600 nm thick GaN growth using ammonia source for (upper) [110] and (lower) [001] azimuth.

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Preparation of Field Effect Transistor with $(Bi,La)Ti_3O_{12}$ Ferroelectric Thin Film Gate ($(Bi,La)Ti_3O_{12}$ 강유전체 박막 게이트를 갖는 전계효과 트랜지스터 소자의 제작)

  • Suh Kang Mo;Park Ji Ho;Gong Su Cheol;Chang Ho Jung;Chang Young Chul;Shim Sun Il;Kim Yong Tae
    • Proceedings of the International Microelectronics And Packaging Society Conference
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    • 2003.11a
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    • pp.221-225
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    • 2003
  • The MFIS-FET(Field Effect Transistor) devices using $BLT/Y_2O_3$ buffer layer on p-Si(100) substrates were fabricated by the Sol-Gel method and conventional memory processes. The crystal structure, morphologies and electrical properties of prepared devices were investigated by using various measuring techniques. From the C-V(capacitance-voltage) data at 5V, the memory window voltage of the $Pt/BLT/Y_2O_3/si$ structure decreased from 1.4V to 0.6V with increasing the annealing temperature from $700^{\circ}C\;to\;750^{\circ}C$. The drain current (Ic) as a function of gate voltages $(V_G)$ for the $MFIS(Pt/BLT/Y_2O_3/Si(100))-FET$ devices at gate voltages $(V_G)$ of 3V, 4V and 5V, the memory window voltages increased from 0.3V to 0.8V as $V_G$ increased from 3V to 5V.

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A Study of Pore Formation of AAO Film on Si Substrate with Optimizing Process (Si 기판에 제작된 AAO 박막의 기공 형성 최적화에 관한 연구)

  • Kwon, Soon-Il;Yang, Kea-Joon;Song, Woo-Chang;Lee, Jae-Hyeong;Lim, Dong-Gun
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.21 no.5
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    • pp.415-420
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    • 2008
  • AAO films were fabricated on two kinds of substrates such as $Al/SiO_2/Si$ and Al/Ni/Ti/Si. To obtain well-aligned AAO film, we optimized process condition for buffer layer, electrolyte and voltage. In the case of oxalic acid, the AAO film with pore size of approximately 45 nm was obtained at voltage of 40 V, temperature of $10^{\circ}C$, oxalic acid of 0.3 M and widening time of 60 min. Then the thickness of barrier is less than 600 nm. In the case of sulfuric acid, the AAO film has pore size of 40 nm and barrier thickness of 400 nm with optimum conditions such as voltage of 25 V, temperature of $8^{\circ}C$, sulfuric acid of 0.3 M and widening time of 60 min.

Characteristics of Indium Tin Zinc Oxide Thin Film Transistors with Plastic Substrates (고분자 기판과 PECVD 절연막에 따른 ITZO 박막 트랜지스터의 특성 분석)

  • Yang, Dae-Gyu;Kim, Hyoung-Do;Kim, Jong-Heon;Kim, Hyun-Suk
    • Korean Journal of Materials Research
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    • v.28 no.4
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    • pp.247-253
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    • 2018
  • We examined the characteristics of indium tin zinc oxide (ITZO) thin film transistors (TFTs) on polyimide (PI) substrates for next-generation flexible display application. In this study, the ITZO TFT was fabricated and analyzed with a SiOx/SiNx gate insulator deposited using plasma enhanced chemical vapor deposition (PECVD) below $350^{\circ}C$. X-ray photoelectron spectroscopy (XPS) and secondary ion mass spectroscopy (SIMS) results revealed that the oxygen vacancies and impurities such as H, OH and $H_2O$ increased at ITZO/gate insulator interface. Our study suggests that the hydrogen related impurities existing in the PI and gate insulator were diffused into the channel during the fabrication process. We demonstrate that these impurities and oxygen vacancies in the ITZO channel/gate insulator may cause degradation of the electrical characteristics and bias stability. Therefore, in order to realize high performance oxide TFTs for flexible displays, it is necessary to develop a buffer layer (e.g., $Al_2O_3$) that can sufficiently prevent the diffusion of impurities into the channel.

Study on working gas ratio dependance of BST thin film (작업가스비에 따른 BST 박막의 특성)

  • Cui, Ming-Lu;Kwon, Hak-Yong;Park, In-Chul;Kim, Hong-Bae
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2004.07a
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    • pp.393-396
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    • 2004
  • 본 논문에서는 완충층용 MgO 박막을 P-type(100)Si 기판위에 작업가스 $Ar:O_2=80:20$, RF 파워 50W, 기판온도 $400^{\circ}C$, 10mtorr의 작업진공에서 $500{\AA}$ 증착하였다. 제작된 MgO/Si 기판위에 RF Magnetron sputtering법으로 작업가스 $Ar:O_2$의 비율을 90:10, 80:20, 70:30으로 변화하면서 $BST(Ba_{0.5}Sr_{0.5}TiO_3)$ 박막을 약 $2000{\AA}$ 증착하였다. XRD 측정결과 작업가스비의 변화에 관계없이(110)BST와 (111)BST 피크만이 관찰되었으며 작업가스 $Ar:O_2=80:20$에서 가장 양호한 결정성을 나타내었다. I-V 측정결과 인가전계 ${\pm}100kV/cm$에서 $10^{-7}A/cm^2$이하의 양호한 누설전류 특성을 보여주고 있으며 C-V 측정결과 작업가스 $Ar:O_2$의 비율 90:10, 80:20, 70:30에서의 비유전율은 각각 283, 305, 296으로서 작업가스비 80:20에서 제작된 박막의 특성이 가장 우수하였다. 작업가스비 80:20에서 제작된 박막의 SEM 측정결과 결정이 성장되었음을 확인할 수 있었고 그레인의 크기는 약 10nm였다.

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Influence of the RF Power on the Optical and Electrical Properties of ITZO Thin Films Deposited on SiO2/PES Substrate (RF파워가 SiO2/PES 기판위에 증착한 ITZO 박막의 광학적 및 전기적 특성에 미치는 효과)

  • Choi, Byeong-Kyun;Joung, Yang-Hee;Kang, Seong-Jun
    • The Journal of the Korea institute of electronic communication sciences
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    • v.16 no.3
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    • pp.443-450
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    • 2021
  • After selecting a PES substrate with excellent thermal stability and optical properties among plastic substrates, a SiO2 thin film was deposited as a buffer layer to a thickness of 20nm by plasma-enhanced chemical vapor deposition to compensate for the high moisture absorption. Then, the ITZO thin film was deposited by a RF magnetron sputtering method to investigate electrical and optical properties according to RF power. The ITZO thin film deposited at 50W showed the best electrical properties such as a resistivity of 8.02×10-4 Ω-cm and a sheet resistance of 50.13Ω/sq.. The average transmittance of the ITZO thin film in the visible light region(400-800nm) was relatively high as 80% or more when the RF power was 40 and 50W. Figure of Merits (ΦTC and FOM) showed the largest values of 23.90×10-4-1 and 5883 Ω-1cm-1, respectively, in the ITZO thin film deposited at 50W.

Poly Si Buffer-layer 도입에 의한 실리콘 양자점층 두께 증가에 따른 실리콘 양자점 태양전지 효율 향상

  • Baek, Hyeon-Jeong;Park, Jae-Hui;Kim, Tae-Un;Kim, Gyeong-Jung
    • Proceedings of the Korean Vacuum Society Conference
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    • 2012.08a
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    • pp.354-354
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    • 2012
  • 실리콘 양자점 태양전지는 실리콘이 nm 크기의 양자점으로 될 경우 밴드갭이 증가하여 태양광 중의 가시광선을 광전변환에 활용함으로써 효율을 향상시키는 차세대 태양전지이다. 그러나 실리콘 양자점이 SiO2 매질 내에 분포하므로 양자점층의 두께가 증가할 경우 박막의 직렬저항이 증가하여 일정 두께 이상이 되면 효율이 감소하는 결과를 가져온다. 본 연구에서는 두께증가에 따른 효율저하 문제를 해결하기 위해 다결정 실리콘으로 이루어진 완충층을 도입 하였다. 이를 위해 본 연구에서는 두 가지 형태의 실리콘 양자점 태양전지를 제작하여 광전변환 특성을 비교하였다. 첫 번재 구조는 B이 도핑된 단일 실리콘 양자점층 태양전지이다. 양자점층은 2 nm SiOx 층과 2 nm SiO2 층을 적층한 후 $1,100^{\circ}C$에서 20분간 질소 분위기에서 급속 열처리하여 제작하였다. 실리콘 양자점 층의 두께를 40 nm에서 200 nm까지 변화시키면서 효율을 측정한 결과 100 nm 정도에서 효율이 감소하기 시작하였다. 이러한 효율감소는 양자점층의 저항 증가에 따른 전류감소에 의함이 확인되었다. 이와는 대조적으로 실리콘 양자점 층의 저항을 줄이기 위해 실리콘 양자점층 내에 50 nm 간격으로 10 nm 두께의 B이 도핑된 다결정 실리콘층을 배치하는 실리콘 양자점 태양전지를 개발하였다. 이러한 실리콘 양자점 층의 두께를 증가시킬 경우 효율이 지속적으로 증가함을 관찰하였다. 이러한 두 가지 형태의 양자점층을 이차이온질량분석법으로 분석한 결과 단일 실리콘 양자점층의 경우 두께가 약 70 nm 정도부터 이온빔 스퍼터링에 의한 저항증가에 따른 대전현상 (charging)이 관찰되었으나 다결정 실리콘 층이 배치된 실리콘 양자점층에서는 전혀 대전현상이 발생하지 않았다. 이는 다결정 실리콘 층이 캐리어를 이동시키는 매개체 역할을 하는 것으로 해석될 수 있다.

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Analysis for Buffer Leakage Current of High-Voltage GaN Schottky Barrier Diode (고전압 GaN 쇼트키 장벽 다이오드의 완충층 누설전류 분석)

  • Hwang, Dae-Won;Ha, Min-Woo;Roh, Cheong-Hyun;Park, Jung-Ho;Hahn, Cheol-Koo
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.48 no.2
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    • pp.14-19
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    • 2011
  • We have fabricated GaN Schottky barrier diode (SBD) for high-voltage applications on Si substrate. The leakage current and the electrical characteristics of GaN SBD are investigated by annealing metal-semiconductor junctions. Ohmic junctions of Ti/Al/Mo/Au and Schottky junctions of Ni/Au are used in the fabrication. A test structure is proposed to measured buffer leakage current through a mesa structure. When annealing temperature is increased from $700^{\circ}C$ to $800^{\circ}C$, measured buffer leakage current is also increased from 87 nA to 780 nA at the width of 100 ${\mu}m$. The diffusion of Au, Ti, Mo, O into GaN buffer layer increases the leakage current and that is verified by Auger electron spectroscopy. Experimental results show that the low leakage current and the high breakdown voltage of GaN SBD are achieved by annealing metal-semiconductor junctions.

Hard TiN Coating by Magnetron-ICP P $I^3$D

  • Nikiforov, S.A.;Kim, G.H.;Rim, G.H.;Urm, K.W.;Lee, S.H.
    • Journal of the Korean institute of surface engineering
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    • v.34 no.5
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    • pp.414-420
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    • 2001
  • A 30-kV plasma immersion ion implantation setup (P $I^3$) has been equipped with a self-developed 6'-magnetron to perform hard coatings with enhanced adhesion by P $I^3$D(P $I^3$ assisted deposition) process. Using ICP source with immersed Ti antenna and reactive magnetron sputtering of Ti target in $N_2$/Ar ambient gas mixture, the TiN films were prepared on Si substrates at different pulse bias and ion-to-atom arrival ratio ( $J_{i}$ $J_{Me}$ ). Prior to TiN film formation the nitrogen implantation was performed followed by deposition of Ti buffer layer under A $r^{+}$ irradiation. Films grown at $J_{i}$ $J_{Me}$ =0.003 and $V_{pulse}$=-20kV showed columnar grain morphology and (200) preferred orientation while those prepared at $J_{i}$ $J_{Me}$ =0.08 and $V_{pulse}$=-5 kV had dense and eqiaxed structure with (111) and (220) main peaks. X-ray diffraction patterns revealed some amount of $Ti_{x}$ $N_{y}$ in the films. The maximum microhardness of $H_{v}$ =35 GN/ $M^2$ was at the pulse bias of -5 kV. The P $I^3$D technique was applied to enhance wear properties of commercial tools of HSS (SKH51) and WC-Co alloy (P30). The specimens were 25-kV PII nitrogen implanted to the dose 4.10$^{17}$ c $m^{-2}$ and then coated with 4-$\mu\textrm{m}$ TiN film on $Ti_{x}$ $N_{y}$ buffer layer. Wear resistance was compared by measuring weight loss under sliding test (6-mm $Al_2$ $O_3$ counter ball, 500-gf applied load). After 30000 cycles at 500 rpm the untreated P30 specimen lost 3.10$^{-4}$ g, and HSS specimens lost 9.10$^{-4}$ g after 40000 cycles while quite zero losses were demonstrated by TiN coated specimens.s.

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Fabrications and properties of MFIS structure using AIN buffer layer (AIN 버퍼층을 사용한 MFIS 구조의 제작 및 특성)

  • 정순원;김용성;이남열;김진규;정상현;김광호;유병곤;이원재;유인규
    • Proceedings of the IEEK Conference
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    • 2000.11b
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    • pp.29-32
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    • 2000
  • Meta1-ferroelectric-insulator-semiconductor(MFIS) devices using Pt/LiNbO$_{3}$/AIN/Si structure were successfully fabricated. AIN thin films were made into metal-insulator-semiconductor(MIS) devices by evaporating aluminum in a dot array on the film surface. The dielectric constant of the AIN film calculated from the capacitance in the accumulation region in the capacitance-voltage(C-V ) characteristic is 8. The gate leakage current density of MIS devices using a aluminum electrode showed the least value of 1$\times$10$^{-8A}$ $\textrm{cm}^2$ order at the electric field of 500㎸/cm. A typica] value of the dielectric constant of MFIS device was about 23 derived from 1MHz capacitance-voltage (C-V) measurement and the resistivity of the film at the field of 500㎸/cm was about 5.6$\times$ 10$^{13}$ $\Omega$.cmcm

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