• Journal of the Korean Electrochemical Society
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• v.6 no.1
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• pp.59-64
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• 2003

We fabricated mixed ionic-electronic conducting membranes, $CH_4\;Using\;{0.7}Sr_{0.3}Ga_{0.6}Fe_{0.4}O_{3-\delta}$, by solid state reaction method for solid oxide fuel cell. The membranes consisted of single perovskite phase and exhibited high relative density, $>95\%$. We coated $La_{0.6}Sr_{0.4}CoO_{3-\delta}$ layer using screen printing method in order to improve surface reactivity of the $La_{0.7}Sr_{0.3}Ga_{0.6}Fe_{0.4}O_{3-\delta}$. As a result, the oxygen permeation flux of the coated $La_{0.7}Sr_{0.3}Ga_{0.6}Fe_{0.4}O_{3-\delta}$ showed higher value, $0.5ml/min{\cdot}cm^2\;at\;950^{\circ}C$ than the uncoated one. Higher oxygen permeation was observed in the porously coated Lao $La_{0.7}Sr_{0.3}Ga_{0.6}Fe_{0.4}O_{3-\delta}$membranes with larger grain sizes. Syngas, $CO+H_2$, was successfully obtained from methane gas, $CH_4$, using the $La_{0.6}Sr_{0.4}CoO_{3-\delta}$ coated $La_{0.7}Sr_{0.3}Ga_{0.6}Fe_{0.4}O_{3-\delta}$, with over $40\%\;of\;CH_4$ conversion and syngas yield. $La_{0.7}Sr_{0.3}Ga_{0.6}Fe_{0.4}O_{3-\delta}$ membrane was stable even when it was exposed to the reducing environment, methane, for 600 hrs at $950^{\circ}C$.

• Korean Journal of Optics and Photonics
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• v.5 no.1
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• pp.74-79
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• 1994

The characteristics of the type I and type II SHG in LiB305 crystals grown by TSSG method have been investigated using 1064 nm beam from a Q-switched Nd:YAG laser. The measured phase matching angles and angular acceptance bandwidths were $\theta_m=90^{\circ}, \phi_m=11.6^{\circ}$, <$\delta\theta_{int}L_{1/2}=3.3^{\circ}-cm^{1/2}, \theta\phi_{int}L=0.27^{\circ}-cm^{1/2}$ for type I SHG and $\theta_m=20^{\circ}, \phi_m=90^{\circ}$, TEX>$\delta\theta_{int}L_=0.65^{\circ}-cm, \theta\phi_{int}L^{1/2}=3.5^{\circ}-cm^{1/2}$ for type II SHG, respectively. Thp. type I NCPM temperature of 1064 nm beam was found to be $149^{\circ}C$ with the temperature bandwidth $\DeltaTL$of $4.8^{\circ}C-cm$. An energy conversion efficiency of about 1.8% with 2.6 mm thick LBO crystal at an incident power of TEX>$171 MW/\textrm{cm}^2$ was demonstrated. The measured $d_{32} was 0.74\pm0.05 pm/V$..

• The Journal of the Korea Contents Association
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• v.6 no.2
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• pp.162-168
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• 2006

This paper presents a high performance CORDIC circuit based on redundant numbers yielding a minimal number of iteration stages. The minimal number of iteration stages reflects the iteration number yielding a smaller computation error than the truncation error. The minimal number of iterations is found n-4 for $n\geq16$, where n is the number of input angle bits. The CORDIC circuit is based on a redundant number system with a constant scale factor The circuit performs sine and cosine calculations with a delay of {5 (n-4)+ 2[$log_{2}n$]}$\DeltaT$.

• Korean Journal of Optics and Photonics
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• v.15 no.5
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• pp.399-404
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• 2004

We present a quantum interference experiment with frequency-entangled pairs of photons with wavelength of 640 nm and 660 nm produced in the process of parametric down-conversion. When photon pairs in different angular frequencies $\omega$$_1$and $\omega$$_2$are registered by two detectors the coincidence counts exhibits a two-photon fringe as a function of relative time delay $\delta$$\tau$ of two photons within the coherence time depending on the arrangement of the detector pairs.

• Journal of the Institute of Electronics and Information Engineers
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• v.52 no.5
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• pp.51-57
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• 2015

In this paper, in order to design the A / D converter with a high resolution of 14 bits or more for the biological signal processing, CMOS delta sigma modulator that is a 1.8V power supply voltage - were designed. we propose a new structure of The fourth order delta-sigma modulator that needs four op amps but we use only two op amps. By using a time -interleaving technique, we can re-construct the circuit and reuse the op amps. Also, we proposed a KT/C noise reduction circuit to reduce the thermal noise from a noisy resistor. We adjust the size of sampling capacitor between sampling time and integrating time, so we can reduce almost a half of KT/C noise. The measurement results of the chip is fabricated using a Magna 0.18um CMOS n-well1 poly 6 metal process. Power consumption is $828{\mu}W$ from a 1.8V supply voltage. The peak SNDR is measured as a 75.7dB and 81.3dB of DR at 1kHz input frequency and 256kHz sampling frequency. Measurement results show that KT/C noise reduction circuit enhance the 3dB of SNDR. FOM of the circuit is calculated to be 142dB and 41pJ / step.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.4
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• pp.43-51
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• 2013

This paper presents a design and implementation of a low power switched-capacitor 3rd-order delta-sigma modulator for a digital hearing-aid application. The power consumption is reduced by minimizing the output swing of integrators through optimizing the coefficients of modulator architecture and using class-AB output operational amplifiers. The modulator was implemented in a 130nm CMOS technology, and measured to have 79dB of SNR(Signal-to-Noise Ratio) in the signal bandwidth between 100Hz and 10kHz with an oversampling ratio of 160. The power consumption was $60{\mu}W$ from 1.2V power supply and the modulator core occupied $0.53mm{\times}0.53mm$.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.42 no.7 s.337
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• pp.21-26
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• 2005

An area efficient, low power switch-matrix semidigital FIR reconstruction filter for delta-sigma D/A converter is proposed. Filter coefficients are quantified to 7-bit and 7 current sources that correspond to each coefficient bit are used. The proposed semidigital FIR reconstruction filter is designed in a 0.25 um CMOS process and incorporates 1.5 mm$^{2}$ of active area and a power consumption is 3.8 mW at 2.5 V supply. The number of switching transistors is 1419 at 205 filter order. Simulation results show that the filter output has a dynamic range of 104 dB and 84 dB attenuation of out-of-band quantization noise.

• The Journal of the Acoustical Society of Korea
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• v.24 no.4
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• pp.210-216
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• 2005

We Propose a new feature normalization scheme based on eigenspace for achieving robust speech recognition. In general, mean and variance normalization (MVN) is Performed in cepstral domain. However, another MVN approach using eigenspace was recently introduced. in that the eigenspace normalization Procedure Performs normalization in a single eigenspace. This Procedure consists of linear PCA matrix feature transformation followed by mean and variance normalization of the transformed cepstral feature. In this method. 39 dimensional feature distribution is represented using only a single eigenspace. However it is observed to be insufficient to represent all data distribution using only a sin91e eigenvector. For more specific representation. we apply unique na independent eigenspaces to cepstra, delta and delta-delta cepstra respectively in this Paper. We also normalize training data in eigenspace and get the model from the normalized training data. Finally. a feature space rotation procedure is introduced to reduce the mismatch of training and test data distribution in noisy condition. As a result, we obtained a substantial recognition improvement over the basic eigenspace normalization.

• Journal of IKEEE
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• v.21 no.4
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• pp.331-337
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• 2017

In this paper, we present the design of a 20MHz bandwidth 3rd-order continuous-time low-pass sigma-delta modulator with low-noise and low-power consumption. The bandwidth of the system is sufficient to accommodate LTE and other wireless network standards. The 3rd-order low-pass filter with feed-forward architecture achieves the low-power consumption as well as the low complexity. The system uses 3bit flash quantizer to provide fast data conversion. The current-steering DAC achieves low-power and improved sensitivity without additional circuitries. Cross-coupled transistors are adopted to reduce the current glitches. The proposed system achieves a peak SNDR of 65.9dB with 20MHz bandwidth and power consumption of 32.65mW. The in-band IM3 is simulated to be 69dBc with 600mVp-p two tone input tones. The circuit is designed in a 0.18-um CMOS technology and is driven by 500MHz sampling rate signal.

• Proceedings of the Korea Committee for Ocean Resources and Engineering Conference
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• 2003.05a
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• pp.99-104
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• 2003

This study investigated the yearly variation of pollutant loads outflowing from six watershed of Yeong-il Bay and compared the relationship of pollutant load and water quality, and estimated the Inner productivity of Yeong-Il Bay by using ${\Delta}COD$ method which analysis nonlinear process of water quality. As the estimated results for the pollutant loads of Yeong-Il Bay, total COD load outflowing from Hyeong-san river in flood season(summer) of 2001 year was 2275.0 kg/hr and in dry(low water) season(winter) 852.8 kg/hr, respectively. Load quantity in flood season was about 2.67 times than that in dry season. And as the calculated results of the net-flux of water for seven divisions, it showed that the net-flux of water increased for the divisions of the north coast and inner sea of Yeong-Il Bay but decreased for the south coast. On the contrary, for the cases which water quantity increase from land, the net-flux of water in estuary front of Hyeong-san river decreased but outflowing quantity of that though division of the south coast of Homi-got increased. Finally, this study compared the Inner productions for flood and dry season of Yeong-il Bay by using ${\Delta}COD$ method.