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10-GHz band 2 × 2 phased-array radio frequency receiver with 8-bit linear phase control and 15-dB gain control range using 65-nm complementary metal-oxide-semiconductor technology

  • Seon-Ho Han (AI SoC Research Division, Electronics and Telecommunications Research Institute) ;
  • Bon-Tae Koo (AI SoC Research Division, Electronics and Telecommunications Research Institute)
  • 투고 : 2023.04.13
  • 심사 : 2023.08.08
  • 발행 : 2024.08.20

초록

We propose a 10-GHz 2 × 2 phased-array radio frequency (RF) receiver with an 8-bit linear phase and 15-dB gain control range using 65-nm complementary metal-oxide-semiconductor technology. An 8 × 8 phased-array receiver module is implemented using 16 2 × 2 RF phased-array integrated circuits. The receiver chip has four single-to-differential low-noise amplifier and gain-controlled phase-shifter (GCPS) channels, four channel combiners, and a 50-Ω driver. Using a novel complementary bias technique in a phase-shifting core circuit and an equivalent resistance-controlled resistor-inductor-capacitor load, the GCPS based on vector-sum structure increases the phase resolution with weighting-factor controllability, enabling the vector-sum phase-shifting circuit to require a low current and small area due to its small 1.2-V supply. The 2 × 2 phased-array RF receiver chip has a power gain of 21 dB per channel and a 5.7-dB maximum single-channel noise-figure gain. The chip shows 8-bit phase states with a 2.39° root mean-square (RMS) phase error and a 0.4-dB RMS gain error with a 15-dB gain control range for a 2.5° RMS phase error over the 10 to10.5-GHz band.

키워드

과제정보

This work was supported by a Korea Evaluation Institute of Industrial Technology (KEIT) grant funded by the Korean government (MOTIE) (No. 20024996, Development of Radar Components and System for Disaster Scene Humans). This work was also supported by MTG's cooperation in the measurement processes.

참고문헌

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