Journal of the Semiconductor & Display Technology (반도체디스플레이기술학회지)

The Korean Society Of Semiconductor & Display Technology (한국반도체디스플레이기술학회)
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Design and Implementation of RISC-V Pipeline Processor Supporting RV32IMC Instruction Extensions for High-Performance Embedded Devices

고성능 임베디드 디바이스를 위한 RV32IMC명령어 확장을 지원하는 RISC-V 파이프라인 프로세서 설계 및 구현

  • Kyeongwoo Park (Department of System Semiconductor Engineering, Sangmyung University) ;
  • Hyeonjin Sim (Department of System Semiconductor Engineering, Sangmyung University) ;
  • Sunhee Kim (Department of System Semiconductor Engineering, Sangmyung University) ;
  • Yongwoo Kim (Department of Technology Education, Korea National University of Education)
  • 박경우 (상명대학교 시스템반도체공학과) ;
  • 심현진 (상명대학교 시스템반도체공학과) ;
  • 김선희 (상명대학교 시스템반도체공학과) ;
  • 김용우 (한국교원대학교 기술교육과)
  • Received : 2024.05.30
  • Accepted : 2024.09.12
  • Published : 2024.09.30
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Abstract

Recent research on embedded systems has become increasingly important due to their central role in high-performance embedded devices, including artificial intelligence, autonomous driving, and energy management technologies. Embedded systems are specialized computer systems designed to perform specific tasks while optimizing performance and minimizing memory usage. RISC-V, an open RISC-based instruction set architecture developed by the University of Berkeley in 2010, is well-suited for these systems. In addition to the base 32-bit integer instruction set, RISC-V supports extensions such as the M-extension for multiplication and division and the C-extension for instruction compression. In this paper, we propose the design of a 32-bit 5-stage pipeline RV32IMC processor aimed at high-performance embedded devices. By incorporating the RV32IMC instruction set, the proposed processor achieves enhanced computational efficiency and reduced code size, making it a strong candidate for energy-efficient, high-performance embedded applications. Furthermore, the design was validated on an Artix-7 field-programmable gate array, demonstrating the processor's feasibility and potential benefits for embedded systems.

Keywords

Acknowledgement

다음의 성과는 과학기술정보통신부와 연구개발특구진흥재단이 지원하는 과학벨트지원사업으로 수행된 연구결과입니다.

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