Journal of the Semiconductor & Display Technology (반도체디스플레이기술학회지)

The Korean Society Of Semiconductor & Display Technology (한국반도체디스플레이기술학회)
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UVM-based Verification of Equalizer Module for Telecommunication System

통신시스템용 등화기 모듈을 위한 UVM 기반 검증

  • Dae-Won Moon (Department of Electronic and Information and System Eng., SangMyung University) ;
  • Dae-Ki Hong (Department of Electronic and Information and System Eng., SangMyung University)
  • 문대원 (상명대학교 전자정보시스템공학과) ;
  • 홍대기 (상명대학교 전자정보시스템공학과)
  • Received : 2024.01.11
  • Accepted : 2024.03.20
  • Published : 2024.03.31
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Abstract

In the present modern day, as the complexity and size of SoC(System on Chip) increase, the importance of design verification are increasing, Therefore it takes a lot of time to verify the design. There is an emerging need to manage the verification environment faster and more efficiently by reusing the existing verification environment. UVM-based verification is a standardized and highly reliable verification method widely adopted and used in the semiconductor industry. This paper presents a UVM-based verification for the 4 tap equalizer module with a systolic array structure. Through the constraints randomization, it was confirmed that various test scenarios stimulus were generated. In addition, by verifying a simulation comparing the actual DUT outputs with the MATLAB reference outputs, the reuse and efficiency of the UVM test bench could be confirmed.

Keywords

Acknowledgement

다음의 성과는 과학기술정보통신부와 연구개발특구진흥재단이 지원하는 과학벨트지원사업으로 수행된 연구결과입니다.

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