Journal of Power Electronics

The Korean Institute of Power Electronics (전력전자학회)
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Correction method for calculating junction temperature considering parasitic effects in SiC MOSFETs

  • Fan Liu (Key Laboratory of Control Theory and Applications in Complicated System, Tianjin University of Technology) ;
  • Mingxing Du (Key Laboratory of Control Theory and Applications in Complicated System, Tianjin University of Technology) ;
  • Jinliang Yin (Key Laboratory of Control Theory and Applications in Complicated System, Tianjin University of Technology) ;
  • Chao Dong (Key Laboratory of Control Theory and Applications in Complicated System, Tianjin University of Technology) ;
  • Ziwei Ouyang (Key Laboratory of Control Theory and Applications in Complicated System, Tianjin University of Technology)
  • Received : 2022.05.30
  • Accepted : 2022.11.10
  • Published : 2023.04.20
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Abstract

The turn-on change rate of drain current diDS(on)/dt is an electrical parameter that is suitable for the online monitoring of junction temperature in SiC MOSFETs. In practical applications, the change of an external circuit changes the temperature-sensitive characteristic of diDS(on)/dt. In this paper, a SiC MOSFET in a Buck converter is taken as the research object. First, it is theoretically derived and experimentally verified that the power loop inductance and drive loop resistance are parasitic parameters that affect the temperature-sensitive characteristic of diDS(on)/dt. Second, according to the spectrum peak characteristics caused by the drain-source turn-of oscillation voltage of the SiC MOSFET, the theoretical relationship between the diDS(on)/dt temperature-sensitive characteristic and the peak of the drain-source turn-of oscillation voltage is studied. It is concluded that the spectrum peak can reflect the change of the diDS(on)/dt temperature-sensitive characteristic caused by the change of the parasitic parameters. Based on the above research, a model of a modified diDS(on)/dt temperature-sensitive characteristic considering parasitic effect is established in this paper. Through experimental verification, this model can largely eliminate the junction temperature monitoring error caused by the change of the external circuit.

Keywords

Acknowledgement

This work was supported by Tianjin Municipal Science and Technology Project (No. 20YDTPJC00510).

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