Journal of Power Electronics

The Korean Institute of Power Electronics (전력전자학회)
권호 표지
DOI QR코드

DOI QR Code

Modulation method of parallel interleaved three-level inverter considering neutral point potential and phase current balance

  • Ying Zhong (National Key Laboratory for Vessel Integrated Power System Technology, Naval University of Engineering) ;
  • Weichao Li (National Key Laboratory for Vessel Integrated Power System Technology, Naval University of Engineering) ;
  • Liang Zhou (National Key Laboratory for Vessel Integrated Power System Technology, Naval University of Engineering) ;
  • Chen Deng (National Key Laboratory for Vessel Integrated Power System Technology, Naval University of Engineering) ;
  • Jinyang Han (National Key Laboratory for Vessel Integrated Power System Technology, Naval University of Engineering)
  • Received : 2022.08.20
  • Accepted : 2022.11.15
  • Published : 2023.02.20
⟨ Previous Next ⟩

Abstract

The capacity and equivalent switching frequency of parallel interleaved inverters can be increased, but there are problems with neutral point potential balance and parallel bridge circulating current. This paper regards the parallel three-level inverter as a five-level inverter and five-level space vector integrated modulation is applied. On this basis, a neutral-point potential control strategy based on the mid-point charge to calculate the adjustment factor k is proposed. By further meticulously partitioning specific sector regions, the selection method of redundant vectors in the switching sequence is optimized without increasing the switching times, and the midpoint voltage ripple is reduced. Then, the redundant state allocation in the process of splitting the five-level into three-level is used as a new degree of freedom to suppress the circulating current of the parallel bridge, therefore realizing the control of voltage and current sharing. Finally, simulation and experiments verify the correctness and effectiveness of the method.

Keywords

References

  1. Rodriguez, J., Bernet, S., Steimer, P.K.: A survey on neutral point clamped inverters. IEEE Trans. Industr. Electron. 57(7), 2219-2230 (2010)  https://doi.org/10.1109/TIE.2009.2032430
  2. Marzoughi, A., Burgos, R., Boroyevich, D., Xue, Y.: Design and comparison of cascaded H-bridge, modular multilevel converter and 5L active neutral point clamped topologies for motor drive applications. IEEE Trans. Ind. Appl. 54(2), 1404-1413 (2018)  https://doi.org/10.1109/tia.2017.2767538
  3. Cao, Y., Li, R.: An interleaved nine-level photovoltaic inverter. Proc. CSEE. 10(13), 13-19 (2020) 
  4. Shen, Z., Jiang, D., Chen, J.: Circulating current reduction for paralleled inverters with modified zero-CM PWM algorithm. IEEE Trans. Ind. Appl. 54(4), 3518-3528 (2018)  https://doi.org/10.1109/tia.2018.2821653
  5. Li, W., Han, J., Zhou, L., Deng, C., Yan, M.: A Novel SVPWM Method for NPC three-level interleaved H-bridge inverter. In: Proceedings of IEEE Energy Conversion Congress and Exposition, pp. 2606-2611. Detroit, MI (2020) 
  6. Gong, Z., Zhang, H., Dai, P.: Leg-unified pulse width modulation strategy for novel parallel interleaved multilevel converters. Proc. CSEE. 38(23), 7026-7034 (2018) 
  7. Zhou, L., Deng, C., Li, W., Yan, M., Han, J., Zhong, Y.: Investigation on the 36MVA PP-IGBT-Based Power Converter for High-Speed Maglev Applications. 13th International Symposium on Linear Drives for Industry Applications (LDIA), 1-6 (2021) 
  8. Wang, W., Wang, G.S.: DC-link capacitor voltage balance strategy of independent double three-phase common bus five-level NPC/H bridge inverter based on finite control set. IET Power Electron. 13(7), 1546-1553F (2020) 
  9. Song, W., Feng, X., Smedley, K.M.: A carrier-based PWM strategy with the offset voltage injection for single-phase three-level neutral-point-clamped converters. IEEE Trans. Power Electron. 28(3), 1083-1095 (2013)  https://doi.org/10.1109/TPEL.2012.2210248
  10. Lee, S., Hong, W., Kim, T., Kim, G., Lee, E.S., Lee, S.: Voltage balancing control of a series-resonant DAB converter with a virtual line shaft. J. Power Electron. 22(8), 1347-1356 (2022)  https://doi.org/10.1007/s43236-022-00466-2
  11. Guan, B., Doki, S.: Optimal two degrees-of-freedom based neutral point potential control for three-level neutral point clamped converters. J. Power Electron. 19(1), 119-133 (2019)  https://doi.org/10.6113/JPE.2019.19.1.119
  12. Orfanoudakis, G.I., Yuratich, M.A., Sharkh, S.M.: Nearest-Vector modulation strategies with minimum amplitude of low-frequency neutral-point voltage oscillations for the neutral-point-clamped converter. IEEE Trans. Power Electron. 28(10), 4485-4499 (2013)  https://doi.org/10.1109/TPEL.2012.2236686
  13. Li, W., Ma, W., Wang, G.: A novel SVPWM method for single-phase cascaded NPC H-bridge inverter. Proc. CSEE. 34(30), 5313-5319 (2014) 
  14. Jiang, L., Xiao, F., Hu, L.: SVPWM algorithm for five-level active-neutral-point-clamped H-bridge inverters. J. Power Electron. 21(8), 1123-1134 (2021)  https://doi.org/10.1007/s43236-021-00259-z
  15. Song, W., Chen, G., Wu, H.: A novel SVPWM strategy and its implementation considering neutral-point potential balancing for three-level NPC inverter. Proc. CSEE. 26(12), 95-100 (2006) 
  16. Zhou, J., Jia, B., Zhang, X.: A hybrid three-level neutral-point balance control strategy. Proc. CSEE. 33(24), 82-89 (2013) 
  17. Hu, C., Yu, X., Holmes, D.G.: An improved virtual space vector modulation scheme for three-level active neutral-point-clamped inverter. IEEE Trans. Power Electron. 32(10), 7419-7434 (2017)  https://doi.org/10.1109/TPEL.2016.2621776
  18. Busquets-Monge, S., Bordonau, J., Boroyevich, D., Somavilla, S.: The nearest three virtual space vector PWM-A modulation for the comprehensive neutral-point balancing in the three-level NPC inverter. IEEE Power Electron. 2(1), 11-15 (2004)  https://doi.org/10.1109/LPEL.2004.828445
  19. Busquets, M.S., Alepuz, S., Rocabert, J.: Pulse width modulations for the comprehensive capacitor voltage balance of diode-clamped multilevel converters. IEEE Trans. Power Electron. 24(5), 1951-1959 (2009)  https://doi.org/10.1109/TPEL.2009.2017918
  20. Quan, Z., Li, Y.: A three-level space vector modulation scheme for paralleled converters to reduce circulating current and common-mode voltage. IEEE Trans. Power Electron. 32(1), 703-714 (2017)  https://doi.org/10.1109/TPEL.2016.2529959
  21. Jiang, D., Shen, Z., Wang, F.: Common-mode voltage reduction for paralleled inverters. IEEE Trans. Power Electron. 33(5), 3961-3974 (2018)  https://doi.org/10.1109/tpel.2017.2712369
  22. Li, W., Zhang, X., Zhuang, Y.: A novel zero-common-mode-voltage modulation method based on five-level vector space for parallel operated three-level inverters. Proc. CSEE 40(19), 6308-6319 (2020) 
  23. Li, W., Zhang, X., Zhang, F.: Integrated modulation of dual-parallel three-level inverters with reduced common mode voltage and circulating current. IEEE Trans. Power Electron. 36(11), 13322-13344 (2021) 
  24. Qamar, M.A., Wang, K., Zheng, Z., Wang, S., Li, Y.: A simplified virtual vector PWM algorithm to balance the capacitor voltages of four level diode-clamped converter. IEEE Access 8, 180896-180908 (2020)  https://doi.org/10.1109/access.2020.3028444
  25. Attique, Q.M., Wang, K., Zheng, Z., et al.: A generalized simplified virtual vector pwm to balance the capacitor voltages of multilevel diode-clamped converters [J]. IEEE Trans. Power Electron. 37(8), 9377-9391 (2022)  https://doi.org/10.1109/TPEL.2022.3155446
  26. Niu, J., Chen, R., Zhang, Z.: Analysis of circulating harmonic currents in paralleled three level ANPC inverters using SVM. In: In: Proceedings of IEEE Applied Power Electronics Conference and Exposition, pp. 2481-2487. Anaheim, CA (2019) 
  27. TMS320F2837xD Dual-Core Delfino Microcontrollers, 2017. https: //www.ti.com/product/TMS320F28379D 
  28. Kintex-7 FPGAs Data Sheet: DC and AC Switching Characteristics[R].2021.3:https://docs.xilinx.com/v/u/en-US/ds182_Kintex_7_Data_Sheet