Journal of Power Electronics

The Korean Institute of Power Electronics (전력전자학회)
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Negative sequence control for DC voltage balancing in three-phase cascaded H-bridge rectifiers considering DC-port failures

  • Xinyu, Zhu (Institute of Aviation Electronic and Electrical Engineering, Civil Aviation Flight University of China) ;
  • Xiao, Liang (Institute of Aviation Electronic and Electrical Engineering, Civil Aviation Flight University of China) ;
  • Kaiyue, Gong (Institute of Aviation Electronic and Electrical Engineering, Civil Aviation Flight University of China) ;
  • Xu, Peng (Institute of Aviation Electronic and Electrical Engineering, Civil Aviation Flight University of China) ;
  • Jun, Cai (Institute of Aviation Electronic and Electrical Engineering, Civil Aviation Flight University of China) ;
  • Xiaohan, Liu (Institute of Aviation Electronic and Electrical Engineering, Civil Aviation Flight University of China) ;
  • Chao, Zhou (Institute of Aviation Electronic and Electrical Engineering, Civil Aviation Flight University of China) ;
  • Siqi, An (Institute of Aviation Electronic and Electrical Engineering, Civil Aviation Flight University of China) ;
  • Chao, Wu (School of Electronic Engineering and Automation, Luoyang Institute of Science and Technology) ;
  • Pengcheng, Han (School of Electronic Engineering and Automation, Luoyang Institute of Science and Technology)
  • Received : 2021.11.24
  • Accepted : 2022.07.20
  • Published : 2022.12.20
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Abstract

As a vital component of power electronic transformers (PET), the reliability of a cascaded H-bridge rectifier (CHBR) is essential. Therefore, in this paper, a DC-port voltage balance strategy considering DC-port failure is researched to ensure the stable operation of a CHBR. However, if the DC-port voltage balance strategy is adopted to realize the single-phase balance of a CHBR, the three-phase currents become unbalanced. This paper uses a negative sequence control (NSC) strategy that is conducive to balancing DC-port voltage to achieve three-phase current balance. For the DC-port voltage balance, the matrix generation modulation (MGM) algorithm is proposed. In addition, the DC-port voltage balance boundary is analyzed to determine the range of the DC-port voltage balance in the CHBR. A 3-module cascading topology is adopted to demonstrate the MGM algorithm and the NSC strategy. Through experiments, results show the correctness and feasibility of the proposed strategy.

Keywords

Acknowledgement

This research was supported by Science and Technology Plan Program of Sichuan Grant Number 0272109, the program of CAFUC Grant Number ZX2021-03 and the Graduate Science and Technology Innovation Fund Project of CAFUC Grant Number X2021-11.

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