Journal of the Semiconductor & Display Technology (반도체디스플레이기술학회지)

The Korean Society Of Semiconductor & Display Technology (한국반도체디스플레이기술학회)
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In-situ Warpage Measurement Technique Using Impedance Variation

임피던스 변화를 이용한 실시간 기판 변형 측정

  • Kim, Woo Jae (Kwangwoon University Dept. of Electrical and Biological Physics) ;
  • Shin, Gi Won (Kwangwoon University Dept. of Electrical and Biological Physics) ;
  • Kwon, Hee Tae (Kwangwoon University Dept. of Electrical and Biological Physics) ;
  • On, Bum Soo (Kwangwoon University Dept. of Electrical and Biological Physics) ;
  • Park, Yeon Su (Kwangwoon University Dept. of Electrical and Biological Physics) ;
  • Kim, Ji Hwan (Kwangwoon University Dept. of Electrical and Biological Physics) ;
  • Bang, In Young (Kwangwoon University Dept. of Electrical and Biological Physics) ;
  • Kwon, Gi-Chung (Kwangwoon University Dept. of Electrical and Biological Physics)
  • 김우재 (광운대학교 전자바이오물리학과) ;
  • 신기원 (광운대학교 전자바이오물리학과) ;
  • 권희태 (광운대학교 전자바이오물리학과) ;
  • 온범수 (광운대학교 전자바이오물리학과) ;
  • 박연수 (광운대학교 전자바이오물리학과) ;
  • 김지환 (광운대학교 전자바이오물리학과) ;
  • 방인영 (광운대학교 전자바이오물리학과) ;
  • 권기청 (광운대학교 전자바이오물리학과)
  • Received : 2021.02.09
  • Accepted : 2021.03.18
  • Published : 2021.03.31
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Abstract

The number of processes in the manufacture of semiconductors, displays and solar cells is increasing. And as the processes is performed, multiple layers of films and various patterns are formed on the wafer. At this time, substrate warpage occurs due to the difference in stress between each film and pattern formed on the wafer. the substrate warping phenomenon occurs due to the difference in stress between each film and pattern formed on the wafer. We developed a new warpage measurement method to measure wafer warpage during real-time processing. We performed an experiment to measure the presence and degree of warpage of the substrate in real time during the process by adding only measurement equipment for applying additional electrical signals to the existing ESC and detecting the change of the additional electric signal. The additional electrical measurement signal applied at this time is very small compared to the direct current (DC) power applied to the electrostatic chuck whit a frequency that is not generally used in the process can be selectively used. It was confirmed that the measurement of substrate warpage can be easily separated from other power sources without affecting.

Keywords

References

  1. A. H. Abdelnaby, G. P. Potirniche, F. Barlow, A. Elshabini, S. Groothuis, and R. Parker, "Numerical simulation of silicon wafer warpage due to thin film residual stresses", 2013 IEEE Workshop on Microelectronics and Electron Devices (WMED)., IEEE, pp. 9-12, 2013.
  2. Y. Kim, S. K. Kang, S. D. Kim, and S. E. Kim, "Wafer warpage analysis of stacked wafers for 3D integration", Microelectronic engineering, Vol. 89, pp. 46-49, 2012. https://doi.org/10.1016/j.mee.2011.01.079
  3. B. Leroy, and C. Plougonven, "Warpage of silicon wafers", Journal of the Electrochemical Society, Vol. 127, No. 4, pp. 961-970, 1980. https://doi.org/10.1149/1.2129796
  4. S. I. Takasu, H. Otsuka, N. Yoshihiro, and T. Oku, "Wafer bow and warpage", Japanese Journal of Applied Physics, Vol. 20, No. S1, pp.25-30, 1981. https://doi.org/10.7567/JJAPS.20S1.25
  5. S. Shin, M. Park, S. E. Kim, and S. Kim, "Effects of Wafer Warpage on the Misalignment in Wafer Level Stacking Process", Journal of the Microelectronics and Packaging Society, Vol. 20 No. 3, pp.71-74, 2013. https://doi.org/10.6117/kmeps.2013.20.3.071
  6. K. H. Yang, "An optical imaging method for wafer warpage measurements", Journal of The Electrochemical Society, Vol. 132, No. 5, pp. 1214-1218, 1985. https://doi.org/10.1149/1.2114066
  7. J. Chen, and I. De Wolf, "Study of damage and stress induced by backgrinding in Si wafers", Semiconductor science and technology, Vol.40, No. 4, pp. 87-93, 2003.
  8. K. A. U. S. H. A. L. Verma, and B. Han, "Warpage measurement on dielectric rough surfaces of microelectronics devices by far infrared Fizeau interferometry", Journal of Electronic Packaging, Vol 122, No. 3, pp. 227-232, 2000. https://doi.org/10.1115/1.1286315
  9. B. Han, D. Post, and P. Ifju, "Moire interferometry for engineering mechanics: current practices and future developments", The Journal of Strain Analysis for Engineering Design, Vol. 36, No. 1, pp. 101-117, 2001. https://doi.org/10.1243/0309324011512568
  10. Y. Niu, H. Lee, and S. Park, "A new in-situ warpage measurement of a wafer with speckle-free digital image correlation (DIC) method", 2015 IEEE 65th Electronic Components and Technology Conference (ECTC)., IEEE, pp. 425-431, 2015.
  11. A. Tay, W. K. Ho, and N. Hu, "An in situ approach to real-time spatial control of steady-state wafer temperature during thermal processing in microlithography", IEEE transactions on semiconductor manufacturing, Vol.20, No. 1, pp. 5-12, 2007. https://doi.org/10.1109/TSM.2007.890770
  12. G. W. Shin, H. H. Lee, H. T. Kwon, W. J. Kim, Y. C. Seo, and G. C. Kwon, "Plasma Density Measurement of Linear Atmospheric Pressure DBD Source Using Impedance Variation Method", Journal of the Semiconductor & Display Technology, Vol.17, No. 2. pp. 16-19, 2018.
  13. L. An, and C. R. Friedrich, "Real-time gap impedance monitoring of dielectrophoretic assembly of multiwalled carbon nanotubes", Applied Physics Letters, Vol. 92, No. 17, pp. 173103, 2007. https://doi.org/10.1063/1.2918016
  14. N. C. Jaitly, and T. S. Sudarshan, "In-situ insulator surface charge measurements in dielectric bridged vacuum gaps using an electrostatic probe", IEEE transactions on electrical insulation, Vol.23, No. 2, pp. 261-273, 1988. https://doi.org/10.1109/14.2362