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Low-Power Implementation of A Multichannel Hearing Aid Using A General-purpose DSP Chip

범용 DSP 칩을 이용한 다중 채널 보청기의 저전력 구현

  • 김범준 (연세대학교 전산학과) ;
  • 변준 (연세대학교 전산학과) ;
  • 박영철 (연세대학교 컴퓨터정보통신공학부)
  • Received : 2018.01.30
  • Accepted : 2018.02.20
  • Published : 2018.02.28

Abstract

In this paper, we present a low-power implementation of the multi-channel hearing aid system using a general-purpose DSP chip. The system includes an acoustic amplification algorithm based on Wide Dynamic Range Compression (WDRC), an adaptive howling canceller, and a single-channel noise reduction algorithm. To achieve a low-power implementation, each algorithm is re-constructed in forms of integer program, and the integer program is converted to the assembly program using BelaSigna(R) 250 instructions. Through experiments using the implementation system, the performance of each processing algorithm was confirmed in real-time. Also, the clock of the implementation system was measured, and it was confirmed that the entire signal processing blocks can be performed in real time at about 7.02MHz system clock.

본 논문에서는 범용 DSP 칩을 이용한 저전력 다중 채널 보청기 시스템 구현을 제시한다. 본 시스템은 WDRC(Wide Dynamic Range Compression)를 이용한 음향 증폭 알고리즘, 적응 하울링 제거 알고리즘, 단일 채널 잡음 감소 알고리즘을 포함한다. 저전력 구현을 위해 각 알고리듬을 정수연산 프로그램으로 재구성하였고, BelaSigna(R) 250의 명령어를 사용하여 정수연산 프로그램을 어셈블리 프로그램으로 변환하였다. 실시간 시스템을 사용한 실험을 통해 각 알고리즘의 성능을 확인하였다. 또한 구현 시스템의 클럭을 측정하였으며, 그 결과 전체 신호 처리 블록이 대략 7.02MHz 클럭에서 실시간으로 동작함을 확인하였다.

Keywords

References

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