DOI QR코드

DOI QR Code

Improving the Solution Range in Selective Harmonic Mitigation Pulse Width Modulation Technique for Cascaded Multilevel Converters

  • Najjar, Mohammad (School of Electrical and Computer Engineering, College of Engineering, University of Tehran) ;
  • Iman-Eini, Hossein (School of Electrical and Computer Engineering, College of Engineering, University of Tehran) ;
  • Moeini, Amirhossein (School of Electrical and Computer Engineering, University of Florida) ;
  • Farhangi, Shahrokh (School of Electrical and Computer Engineering, College of Engineering, University of Tehran)
  • 투고 : 2017.03.24
  • 심사 : 2017.06.22
  • 발행 : 2017.09.20

초록

This paper proposes an improved low frequency Selective Harmonic Mitigation-PWM (SHM-PWM) technique. The proposed method mitigates the low order harmonics of the output voltage up to the $50^{th}$ harmonic well and satisfies the grid codes EN 50160 and CIGRE-WG 36-05. Using a modified criterion for the switching angles, the range of the modulation index for non-linear SHM equations is improved, without increasing the switching frequency of the CHB converter. Due to the low switching frequency of the CHB converter, mitigating the harmonics of the converter up to the $50^{th}$ order and finding a wider modulation index range, the size and cost of the passive filters can be significantly reduced with the proposed technique. Therefore, the proposed technique is more efficient than the conventional SHM-PWM. To verify the effectiveness of the proposed method, a 7-level Cascaded H-bridge (CHB) converter is utilized for the study. Simulation and experimental results confirm the validity of the above claims.

키워드

참고문헌

  1. J. Rodriguez, S. Bernet, B. Wu, J. O. Pontt, and S. Kouro, "Multilevel voltage-source-converter topologies for industrial medium-voltage drives," IEEE Trans. Ind. Electron., Vol. 54, No. 6, pp. 2930-2945, Dec. 2007. https://doi.org/10.1109/TIE.2007.907044
  2. F. Z. Peng, J.-S. Lai, J. W. McKeever, and J. VanCoevering, "A multilevel voltage-source inverter with separate DC sources for static VAr generation," IEEE Trans. Ind. Appl., Vol. 32, No. 5, pp. 1130-1138, Sep./Oct. 1996. https://doi.org/10.1109/28.536875
  3. Q. Song and W. Liu, "Control of a cascade STATCOM with star configuration under unbalanced conditions," IEEE Trans. Power Electron., Vol. 24, No. 1, pp. 45-58, Jan. 2009. https://doi.org/10.1109/TPEL.2008.2009172
  4. N. Flourentzou, V. G. Agelidis, and G. D. Demetriades, "VSC-based HVDC power transmission systems: An overview," IEEE Trans. Power Electron., Vol. 24, No. 3, pp. 592-602, Mar. 2009. https://doi.org/10.1109/TPEL.2008.2008441
  5. M. Hagiwara, K. Nishimura, and H. Akagi, "A medium-voltage motor drive with a modular multilevel PWM inverter," IEEE Trans. Power Electron., Vol. 25, No. 7, pp. 1786-1799, Jul. 2010. https://doi.org/10.1109/TPEL.2010.2042303
  6. Y. Liu, H. Hong, and A. Q. Huang, "Real-time calculation of switching angles minimizing THD for multilevel inverters with step modulation," IEEE Trans. Ind. Electron., Vol. 56, No. 2, pp. 285-293, Feb. 2009. https://doi.org/10.1109/TIE.2008.918461
  7. L. M. Tolbert, J. N. Chiasson, Zhong Du, and K. J. McKenzie, "Elimination of harmonics in a multilevel converter with nonequal DC sources," IEEE Trans. Ind. Appl., Vol. 41, No. 1, pp. 75-82, Jan./Feb. 2005. https://doi.org/10.1109/TIA.2004.841162
  8. V. G. Agelidis, A. I. Balouktsis, and C. Cossar, "On attaining the multiple solutions of selective harmonic elimination PWM three-level waveforms through function minimization," IEEE Trans. Ind. Electron., Vol. 55, No. 3, pp. 996-1004, Mar. 2008. https://doi.org/10.1109/TIE.2007.909728
  9. M. K. Bakhshizadeh, M. Najjar, F. Blaabjerg, and R. Sajadi, "Using variable DC sources in order to improve the voltage quality of a multilevel STATCOM with low frequency modulation," 2016 18th European Conference on Power Electronics and Applications (EPE'16 ECCE Europe), 2016.
  10. W. Fei, X. Du, and B. Wu, "A generalized half-wave symmetry SHE-PWM formulation for multilevel voltage inverters," IEEE Trans. Ind. Electron., Vol. 57, No. 9, pp. 3030-3038, Sep. 2010. https://doi.org/10.1109/TIE.2009.2037647
  11. M. Najjar, H. Iman-Eini, and A. Moeini, "Increasing the range of modulation indices with the polarities of cells and switching constraint reliefs for the selective harmonic elimination pulse width modulation technique," Journal of Power Electronics, Vol. 17, No. 4, pp. 933-941, Jul. 2017. https://doi.org/10.6113/JPE.2017.17.4.933
  12. L. G. Franquelo, J. Napoles, R. C. P. Guisado, J. I. Leon, and M. A. Aguirre, "A flexible selective harmonic mitigation technique to meet grid codes in three-level PWM converters," IEEE Trans. Ind. Electron., Vol. 54, No. 6, pp. 3022-3029, Dec. 2007. https://doi.org/10.1109/TIE.2007.907045
  13. J. Napoles, R. Portillo, J. I. Leon, M. A. Aguirre, and L. G. Franquelo, "Implementation of a closed loop SHMPWM technique for three level converters," 34th Annual Conference of IEEE. Industrial Electronics, 2008. IECON 2008, pp. 3260-3265, 2008.
  14. M. S. A. Dahidah, G. S. Konstantinou, and V. G. Agelidis, "Selective harmonic elimination pulse-width modulation seven-level cascaded H-bridge converter with optimised DC voltage levels," IET Power Electron., Vol. 5, No. 6, pp. 852-862, Jul. 2012. https://doi.org/10.1049/iet-pel.2011.0463
  15. N. Ghasemi, F. Zare, A. A. Boora, A. Ghosh, C. Langton, and F. Blaabjerg, "Harmonic elimination technique for a single-phase multilevel converter with unequal DC link voltage levels," IET Power Electron., Vol.5, No.8, pp.1418-1429, September 2012. https://doi.org/10.1049/iet-pel.2011.0457
  16. M. Najjar, A. Moeini, M. K. Bakhshizadeh, F. Blaabjerg, and S. Farhangi, "Optimal selective harmonic mitigation technique on variable DC link cascaded H-bridge converter to meet power quality standards," IEEE J. Emerg. Sel. Top Power Electron., Vol. 4, No. 3, pp. 1107-1116, Sep. 2016. https://doi.org/10.1109/JESTPE.2016.2555995
  17. A. Moeini, H. Iman-Eini, and M. Najjar, "Non-equal DC link voltages in a cascaded H-Bridge with a selective harmonic mitigation-PWM technique based on the fundamental switching frequency," Journal of Power Electronics, Vol. 17, No. 1, pp. 106-114, Jan. 2017. https://doi.org/10.6113/JPE.2017.17.1.106
  18. N. Farokhnia, S.H. Fathi, N. Yousef poor, and M. K. Bakhshizadeh, "Minimization of total harmonic distortion in a cascaded multilevel inverter by regulating voltages of dc sources," IET Power Electron., Vol. 5, No. 1, pp. 106-114, Jan. 2012. https://doi.org/10.1049/iet-pel.2011.0092
  19. A. Moeini, H. Iman-Eini, and M. Bakhshizadeh, "Selective harmonic mitigation-pulse-width modulation technique with variable DC-link voltages in single and three-phase cascaded H-bridge inverters," IET Power Electron., Vol. 7, No. 4, pp. 924-932, Apr. 2014. https://doi.org/10.1049/iet-pel.2013.0315
  20. J. Napoles, A. J. Watson, J. J. Padilla, J. I. Leon, L. G. Franquelo, P. W. Wheeler, and M. A. Aguirre, "Selective harmonic mitigation technique for cascaded H-bridge converters with nonequal DC link voltages," IEEE Trans. Ind. Electron., Vol.60, No.5, pp.1963-1971, May 2013. https://doi.org/10.1109/TIE.2012.2192896
  21. A. Marzoughi, H. Imaneini, and A. Moeini, "An optimal selective harmonic mitigation technique for high power converters," International Journal of Electrical Power & Energy Systems, Vol. 49, pp. 34-39, Jul. 2013. https://doi.org/10.1016/j.ijepes.2012.12.007
  22. J. Vassallo, J. C. Clare, and P. W. Wheeler, "A power-equalized harmonic-elimination scheme for utility-connected cascaded H-bridge multilevel converters," The 29th Annual Conference. Industrial Electronics Society, 2003, Vol. 2, pp. 1185-1190, Nov. 2003.
  23. M. Sharifzadeh, H. Vahedi, A. Sheikholeslami, P.-A. Labbe, and K. Al-Haddad, "Hybrid SHM-SHE modulation technique for a four-leg NPC inverter with DC capacitor self-voltage balancing," IEEE Trans. Ind. Electron., Vol. 62, No. 8, pp. 4890-4899, Aug. 2015. https://doi.org/10.1109/TIE.2015.2405059
  24. C. Jiankun, X. Shaojun, and X. Jinming, "Research on a high power inverter with low frequency modulation index by selective harmonic mitigation technique," 9th International Conference. Power Electronics and ECCE Asia (ICPE-ECCE Asia), pp. 2409-2414, 2015.
  25. J. Napoles, J. I. Leon, R. Portillo, L. G. Franquelo, and M. A. Aguirre, "Selective harmonic mitigation technique for high-power converters," IEEE Trans. Ind. Electron., Vol. 57, No. 7, pp. 2315-2323, Jul. 2010. https://doi.org/10.1109/TIE.2009.2026759
  26. EN50160.Voltage characteristics of electricity supplied by public distribution systems; 2004.
  27. CIGRE JWG C4.07, Power quality indices and objectives; 2004.
  28. A. Kavousi, B. Vahidi, R. Salehi, M. Bakhshizadeh, N. Farokhnia, and S. S. Fathi, "Application of the bee algorithm for selective harmonic elimination strategy in multilevel inverters," IEEE Trans. Power Electron., Vol. 27, No. 4, pp. 1689-1696, Apr. 2012. https://doi.org/10.1109/TPEL.2011.2166124
  29. B. Ozpineci, L. M. Tolbert, and J. N. Chiasson, "Harmonic optimization of multilevel converters using genetic algorithms," IEEE Power Electron Lett., Vol. 3, No. 3, pp. 92-95, Sep. 2005. https://doi.org/10.1109/LPEL.2005.856713
  30. R. N. Ray, D. Chatterjee, and S. K. Goswami, "Harmonics elimination in a multilevel inverter using the particle swarm optimisation technique," IET Power Electron., Vol. 2, No. 6, pp. 646-652, Nov. 2009. https://doi.org/10.1049/iet-pel.2008.0180
  31. A. Moeini, H. Zhao, and S. Wang, "Improve control to output dynamic response and extend modulation index range with hybrid selective harmonic current mitigation-PWM and phase-shift PWM for four-quadrant cascaded H-bridge converters," IEEE Trans. Ind. Electron., Vol. 64, No. 9, pp. 6854-6863, Sep. 2017. https://doi.org/10.1109/TIE.2017.2686339
  32. A. Moeini, H. Zhao, and S. Wang, "A current reference based selective harmonic current mitigation PWM technique to improve the performance of cascaded H-bridge multilevel active rectifiers," IEEE Trans. Ind. Electron., to be published.